netdev - [PATCH v2 net-next 1/3] dt-bindings: net: tja11xx: use phy-output-refclk to instead of rmii-refclk-in

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20240822013721.203161-2-wei.fang@nxp.com>
Date: Thu, 22 Aug 2024 09:37:19 +0800
From: Wei Fang <wei.fang@....com>
To: davem@...emloft.net,
	edumazet@...gle.com,
	kuba@...nel.org,
	pabeni@...hat.com,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	andrew@...n.ch,
	f.fainelli@...il.com,
	hkallweit1@...il.com,
	linux@...linux.org.uk,
	andrei.botila@....nxp.com
Cc: netdev@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v2 net-next 1/3] dt-bindings: net: tja11xx: use phy-output-refclk to instead of rmii-refclk-in

Per the RMII specification, the REF_CLK is sourced from MAC to PHY
or from an external source. But for TJA11xx PHYs, they support to
output a 50MHz RMII reference clock on REF_CLK pin. Previously the
"nxp,rmii-refclk-in" was added to indicate that in RMII mode, if
this property present, REF_CLK is input to the PHY, otherwise it
is output. This seems inappropriate now. Because according to the
RMII specification, the REF_CLK is originally input, so there is
no need to add an additional "nxp,rmii-refclk-in" property to
declare that REF_CLK is input. On the contrary, a vendor-defined
property needs to be added if we want the TJA11xx PHYs to provide
the 50MHz RMII reference clock. Therefore, it is more reasonable
to add "nxp,phy-output-refclk" instead of "nxp,rmii-refclk-in".

Signed-off-by: Wei Fang <wei.fang@....com>
---
V2 changes:
1. Changed the property name from "nxp,reverse-mode" to
"nxp,phy-output-refclk".
2. Simplified the description of the property.
3. Modified the subject and commit message.
---
 .../devicetree/bindings/net/nxp,tja11xx.yaml   | 18 +++---------------
 1 file changed, 3 insertions(+), 15 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
index 85bfa45f5122..eb813f7bf274 100644
--- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
+++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
@@ -32,21 +32,9 @@ patternProperties:
         description:
           The ID number for the child PHY. Should be +1 of parent PHY.
 
-      nxp,rmii-refclk-in:
+      nxp,phy-output-refclk:
         type: boolean
-        description: |
-          The REF_CLK is provided for both transmitted and received data
-          in RMII mode. This clock signal is provided by the PHY and is
-          typically derived from an external 25MHz crystal. Alternatively,
-          a 50MHz clock signal generated by an external oscillator can be
-          connected to pin REF_CLK. A third option is to connect a 25MHz
-          clock to pin CLK_IN_OUT. So, the REF_CLK should be configured
-          as input or output according to the actual circuit connection.
-          If present, indicates that the REF_CLK will be configured as
-          interface reference clock input when RMII mode enabled.
-          If not present, the REF_CLK will be configured as interface
-          reference clock output when RMII mode enabled.
-          Only supported on TJA1100 and TJA1101.
+        description: Enable 50MHz RMII reference clock output on REF_CLK pin.
 
     required:
       - reg
@@ -61,7 +49,7 @@ examples:
 
         tja1101_phy0: ethernet-phy@4 {
             reg = <0x4>;
-            nxp,rmii-refclk-in;
+            nxp,phy-output-refclk;
         };
     };
   - |
-- 
2.34.1