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Message-ID: <CAHzn2R2To1pQ+RSWMS+fdKpMzvXLoORRva0MOTpUrYnsQQEy+g@mail.gmail.com>
Date: Thu, 22 Aug 2024 19:02:49 +0200
From: Marcin Wojtas <marcin.s.wojtas@...il.com>
To: Christophe JAILLET <christophe.jaillet@...adoo.fr>
Cc: Yangtao Li <frank.li@...o.com>, clement.leger@...tlin.com, andrew@...n.ch,
f.fainelli@...il.com, olteanv@...il.com, davem@...emloft.net,
edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
ulli.kroll@...glemail.com, linus.walleij@...aro.org, linux@...linux.org.uk,
alexandre.torgue@...s.st.com, joabreu@...opsys.com, hkallweit1@...il.com,
justinstitt@...gle.com, kees@...nel.org, u.kleine-koenig@...gutronix.de,
jacob.e.keller@...el.com, horms@...nel.org, shannon.nelson@....com,
linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com
Subject: Re: [net-next 8/9] net: mvpp2: Convert to devm_clk_get_enabled() and devm_clk_get_optional_enabled()
czw., 22 sie 2024 o 15:20 Christophe JAILLET
<christophe.jaillet@...adoo.fr> napisał(a):
>
> Le 22/08/2024 à 10:47, Yangtao Li a écrit :
> > Use devm_clk_get_enabled() and devm_clk_get_optional_enabled()
> > to simplify code.
> >
> > Signed-off-by: Yangtao Li <frank.li@...o.com>
> > ---
> > drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 7 --
> > .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 86 +++++--------------
> > 2 files changed, 22 insertions(+), 71 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
> > index 9e02e4367bec..643a645e8097 100644
> > --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
> > +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
> > @@ -1044,13 +1044,6 @@ struct mvpp2 {
> > */
> > struct regmap *sysctrl_base;
> >
> > - /* Common clocks */
> > - struct clk *pp_clk;
> > - struct clk *gop_clk;
> > - struct clk *mg_clk;
> > - struct clk *mg_core_clk;
> > - struct clk *axi_clk;
> > -
> > /* List of pointers to port structures */
> > int port_count;
> > struct mvpp2_port *port_list[MVPP2_MAX_PORTS];
> > diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> > index 2fe8bae4eb3c..0075499de29f 100644
> > --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> > +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> > @@ -7462,6 +7462,7 @@ static int mvpp2_get_sram(struct platform_device *pdev,
> >
> > static int mvpp2_probe(struct platform_device *pdev)
> > {
> > + struct clk *pp_clk, *gop_clk, *mg_clk, *mg_core_clk, *axi_clk;
>
> Hi,
>
> Nitpick: you could also define just struct clk *pp_clk, *clk; and reuse
> clk for most calls.
> *Maybe* clk_get_rate() could be moved in order to only need 1 clk.
>
I'm also supportive to optimizing for amount of variables used, as
they are all local now.
Best regards,
Marcin
> CJ
>
> > struct mvpp2 *priv;
> > struct resource *res;
> > void __iomem *base;
> > @@ -7561,56 +7562,30 @@ static int mvpp2_probe(struct platform_device *pdev)
> > priv->max_port_rxqs = 32;
> >
> > if (dev_of_node(&pdev->dev)) {
> > - priv->pp_clk = devm_clk_get(&pdev->dev, "pp_clk");
> > - if (IS_ERR(priv->pp_clk))
> > - return PTR_ERR(priv->pp_clk);
> > - err = clk_prepare_enable(priv->pp_clk);
> > - if (err < 0)
> > - return err;
> > + pp_clk = devm_clk_get_enabled(&pdev->dev, "pp_clk");
> > + if (IS_ERR(pp_clk))
> > + return PTR_ERR(pp_clk);
> >
> > - priv->gop_clk = devm_clk_get(&pdev->dev, "gop_clk");
> > - if (IS_ERR(priv->gop_clk)) {
> > - err = PTR_ERR(priv->gop_clk);
> > - goto err_pp_clk;
> > - }
> > - err = clk_prepare_enable(priv->gop_clk);
> > - if (err < 0)
> > - goto err_pp_clk;
> > + gop_clk = devm_clk_get_enabled(&pdev->dev, "gop_clk");
> > + if (IS_ERR(gop_clk))
> > + return PTR_ERR(gop_clk);
> >
> > if (priv->hw_version >= MVPP22) {
> > - priv->mg_clk = devm_clk_get(&pdev->dev, "mg_clk");
> > - if (IS_ERR(priv->mg_clk)) {
> > - err = PTR_ERR(priv->mg_clk);
> > - goto err_gop_clk;
> > - }
> > -
> > - err = clk_prepare_enable(priv->mg_clk);
> > - if (err < 0)
> > - goto err_gop_clk;
> > -
> > - priv->mg_core_clk = devm_clk_get_optional(&pdev->dev, "mg_core_clk");
> > - if (IS_ERR(priv->mg_core_clk)) {
> > - err = PTR_ERR(priv->mg_core_clk);
> > - goto err_mg_clk;
> > - }
> > + mg_clk = devm_clk_get_enabled(&pdev->dev, "mg_clk");
> > + if (IS_ERR(mg_clk))
> > + return PTR_ERR(mg_clk);
> >
> > - err = clk_prepare_enable(priv->mg_core_clk);
> > - if (err < 0)
> > - goto err_mg_clk;
> > + mg_core_clk = devm_clk_get_optional_enabled(&pdev->dev, "mg_core_clk");
> > + if (IS_ERR(mg_core_clk))
> > + return PTR_ERR(mg_core_clk);
> > }
> >
> > - priv->axi_clk = devm_clk_get_optional(&pdev->dev, "axi_clk");
> > - if (IS_ERR(priv->axi_clk)) {
> > - err = PTR_ERR(priv->axi_clk);
> > - goto err_mg_core_clk;
> > - }
> > -
> > - err = clk_prepare_enable(priv->axi_clk);
> > - if (err < 0)
> > - goto err_mg_core_clk;
> > + axi_clk = devm_clk_get_optional_enabled(&pdev->dev, "axi_clk");
> > + if (IS_ERR(axi_clk))
> > + return PTR_ERR(axi_clk);
> >
> > /* Get system's tclk rate */
> > - priv->tclk = clk_get_rate(priv->pp_clk);
> > + priv->tclk = clk_get_rate(pp_clk);
> > } else {
> > err = device_property_read_u32(&pdev->dev, "clock-frequency", &priv->tclk);
> > if (err) {
> > @@ -7622,7 +7597,7 @@ static int mvpp2_probe(struct platform_device *pdev)
> > if (priv->hw_version >= MVPP22) {
> > err = dma_set_mask(&pdev->dev, MVPP2_DESC_DMA_MASK);
> > if (err)
> > - goto err_axi_clk;
> > + return err;
> > /* Sadly, the BM pools all share the same register to
> > * store the high 32 bits of their address. So they
> > * must all have the same high 32 bits, which forces
> > @@ -7630,7 +7605,7 @@ static int mvpp2_probe(struct platform_device *pdev)
> > */
> > err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
> > if (err)
> > - goto err_axi_clk;
> > + return err;
> > }
> >
> > /* Map DTS-active ports. Should be done before FIFO mvpp2_init */
> > @@ -7649,12 +7624,12 @@ static int mvpp2_probe(struct platform_device *pdev)
> > err = mvpp2_init(pdev, priv);
> > if (err < 0) {
> > dev_err(&pdev->dev, "failed to initialize controller\n");
> > - goto err_axi_clk;
> > + return err;
> > }
> >
> > err = mvpp22_tai_probe(&pdev->dev, priv);
> > if (err < 0)
> > - goto err_axi_clk;
> > + return err;
> >
> > /* Initialize ports */
> > device_for_each_child_node_scoped(&pdev->dev, port_fwnode) {
> > @@ -7665,8 +7640,7 @@ static int mvpp2_probe(struct platform_device *pdev)
> >
> > if (priv->port_count == 0) {
> > dev_err(&pdev->dev, "no ports enabled\n");
> > - err = -ENODEV;
> > - goto err_axi_clk;
> > + return -ENODEV;
> > }
> >
> > /* Statistics must be gathered regularly because some of them (like
> > @@ -7698,16 +7672,6 @@ static int mvpp2_probe(struct platform_device *pdev)
> > err_port_probe:
> > for (i = 0; i < priv->port_count; i++)
> > mvpp2_port_remove(priv->port_list[i]);
> > -err_axi_clk:
> > - clk_disable_unprepare(priv->axi_clk);
> > -err_mg_core_clk:
> > - clk_disable_unprepare(priv->mg_core_clk);
> > -err_mg_clk:
> > - clk_disable_unprepare(priv->mg_clk);
> > -err_gop_clk:
> > - clk_disable_unprepare(priv->gop_clk);
> > -err_pp_clk:
> > - clk_disable_unprepare(priv->pp_clk);
> > return err;
> > }
> >
> > @@ -7745,12 +7709,6 @@ static void mvpp2_remove(struct platform_device *pdev)
> >
> > if (!dev_of_node(&pdev->dev))
> > return;
> > -
> > - clk_disable_unprepare(priv->axi_clk);
> > - clk_disable_unprepare(priv->mg_core_clk);
> > - clk_disable_unprepare(priv->mg_clk);
> > - clk_disable_unprepare(priv->pp_clk);
> > - clk_disable_unprepare(priv->gop_clk);
> > }
> >
> > static const struct of_device_id mvpp2_match[] = {
>
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