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Date: Wed, 28 Aug 2024 07:37:00 +0000
From: Wei Fang <wei.fang@....com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Rob Herring <robh@...nel.org>
CC: "davem@...emloft.net" <davem@...emloft.net>, "edumazet@...gle.com"
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"linux@...linux.org.uk" <linux@...linux.org.uk>, "Andrei Botila (OSS)"
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Subject: RE: [PATCH v3 net-next 1/2] dt-bindings: net: tja11xx: add
"nxp,phy-output-refclk" property
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@...nel.org>
> Sent: 2024年8月27日 21:27
> To: Wei Fang <wei.fang@....com>; Rob Herring <robh@...nel.org>
> Cc: davem@...emloft.net; edumazet@...gle.com; kuba@...nel.org;
> pabeni@...hat.com; krzk+dt@...nel.org; conor+dt@...nel.org;
> andrew@...n.ch; f.fainelli@...il.com; hkallweit1@...il.com;
> linux@...linux.org.uk; Andrei Botila (OSS) <andrei.botila@....nxp.com>;
> netdev@...r.kernel.org; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; imx@...ts.linux.dev
> Subject: Re: [PATCH v3 net-next 1/2] dt-bindings: net: tja11xx: add
> "nxp,phy-output-refclk" property
>
> On 27/08/2024 05:25, Wei Fang wrote:
> >> -----Original Message-----
> >> From: Rob Herring <robh@...nel.org>
> >> Sent: 2024年8月26日 23:50
> >> To: Wei Fang <wei.fang@....com>
> >> Cc: davem@...emloft.net; edumazet@...gle.com; kuba@...nel.org;
> >> pabeni@...hat.com; krzk+dt@...nel.org; conor+dt@...nel.org;
> >> andrew@...n.ch; f.fainelli@...il.com; hkallweit1@...il.com;
> >> linux@...linux.org.uk; Andrei Botila (OSS)
> >> <andrei.botila@....nxp.com>; netdev@...r.kernel.org;
> >> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> >> imx@...ts.linux.dev
> >> Subject: Re: [PATCH v3 net-next 1/2] dt-bindings: net: tja11xx: add
> >> "nxp,phy-output-refclk" property
> >>
> >> On Mon, Aug 26, 2024 at 01:26:59PM +0800, Wei Fang wrote:
> >>> Per the RMII specification, the REF_CLK is sourced from MAC to PHY
> >>> or from an external source. But for TJA11xx PHYs, they support to
> >>> output a 50MHz RMII reference clock on REF_CLK pin. Previously the
> >>> "nxp,rmii-refclk-in" was added to indicate that in RMII mode, if
> >>> this property present, REF_CLK is input to the PHY, otherwise it is output.
> >>> This seems inappropriate now. Because according to the RMII
> >>> specification, the REF_CLK is originally input, so there is no need
> >>> to add an additional "nxp,rmii-refclk-in" property to declare that
> >>> REF_CLK is input.
> >>> Unfortunately, because the "nxp,rmii-refclk-in" property has been
> >>> added for a while, and we cannot confirm which DTS use the TJA1100
> >>> and
> >>> TJA1101 PHYs, changing it to switch polarity will cause an ABI break.
> >>> But fortunately, this property is only valid for TJA1100 and TJA1101.
> >>> For TJA1103/TJA1104/TJA1120/TJA1121 PHYs, this property is invalid
> >>> because they use the nxp-c45-tja11xx driver, which is a different
> >>> driver from TJA1100/TJA1101. Therefore, for PHYs using
> >>> nxp-c45-tja11xx driver, add "nxp,phy-output-refclk" property to
> >>> support outputting RMII reference clock on REF_CLK pin.
> >>>
> >>> Signed-off-by: Wei Fang <wei.fang@....com>
> >>> ---
> >>> V2 changes:
> >>> 1. Change the property name from "nxp,reverse-mode" to
> >>> "nxp,phy-output-refclk".
> >>> 2. Simplify the description of the property.
> >>> 3. Modify the subject and commit message.
> >>> V3 changes:
> >>> 1. Keep the "nxp,rmii-refclk-in" property for TJA1100 and TJA1101.
> >>> 2. Rephrase the commit message and subject.
> >>> ---
> >>> Documentation/devicetree/bindings/net/nxp,tja11xx.yaml | 6 ++++++
> >>> 1 file changed, 6 insertions(+)
> >>
> >> This binding is completely broken. I challenge you to make it report any
> errors.
> >> Those issues need to be addressed before you add more properties.
> >>
> > Sorry, I'm not sure I fully understand what you mean, do you mean I
> > need
>
> Make an intentional error in your DTS and then validate that the schema
> catches it. That's the challenge.
>
Thanks, got it, I will fix the issue first.
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