netdev - [PATCH v5 7/8] arm64: dts: qcom: ipq5332: add support for the NSSCC

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Message-ID: <20240829082830.56959-8-quic_varada@quicinc.com>
Date: Thu, 29 Aug 2024 13:58:29 +0530
From: Varadarajan Narayanan <quic_varada@...cinc.com>
To: <andersson@...nel.org>, <mturquette@...libre.com>, <sboyd@...nel.org>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <konradybcio@...nel.org>, <catalin.marinas@....com>, <will@...nel.org>,
        <djakov@...nel.org>, <richardcochran@...il.com>,
        <geert+renesas@...der.be>, <dmitry.baryshkov@...aro.org>,
        <neil.armstrong@...aro.org>, <arnd@...db.de>,
        <nfraprado@...labora.com>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-pm@...r.kernel.org>, <netdev@...r.kernel.org>
CC: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>,
        Varadarajan Narayanan
	<quic_varada@...cinc.com>
Subject: [PATCH v5 7/8] arm64: dts: qcom: ipq5332: add support for the NSSCC

From: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>

Describe the NSS clock controller node and it's relevant external
clocks.

Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
---
v5: Remove #power-domain-cells
    Add #interconnect-cells
---
 arch/arm64/boot/dts/qcom/ipq5332.dtsi | 28 +++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 71328b223531..1cc614de845c 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -16,6 +16,18 @@ / {
 	#size-cells = <2>;
 
 	clocks {
+		cmn_pll_nss_200m_clk: cmn-pll-nss-200m-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <200000000>;
+			#clock-cells = <0>;
+		};
+
+		cmn_pll_nss_300m_clk: cmn-pll-nss-300m-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <300000000>;
+			#clock-cells = <0>;
+		};
+
 		sleep_clk: sleep-clk {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
@@ -479,6 +491,22 @@ frame@...8000 {
 				status = "disabled";
 			};
 		};
+
+		nsscc: clock-controller@...00000 {
+			compatible = "qcom,ipq5332-nsscc";
+			reg = <0x39b00000 0x80000>;
+			clocks = <&cmn_pll_nss_200m_clk>,
+				 <&cmn_pll_nss_300m_clk>,
+				 <&gcc GPLL0_OUT_AUX>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <&xo_board>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#interconnect-cells = <1>;
+		};
 	};
 
 	timer {
-- 
2.34.1