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Message-ID: <gomm5yozebwfuhmgziajmkflbj6knmbwae4mls5kuwl5ngcbrx@mndpiktfken2>
Date: Sat, 31 Aug 2024 08:11:00 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Varadarajan Narayanan <quic_varada@...cinc.com>
Cc: andersson@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, konradybcio@...nel.org,
catalin.marinas@....com, will@...nel.org, djakov@...nel.org, richardcochran@...il.com,
geert+renesas@...der.be, dmitry.baryshkov@...aro.org, neil.armstrong@...aro.org,
arnd@...db.de, nfraprado@...labora.com, linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-pm@...r.kernel.org, netdev@...r.kernel.org,
Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
Subject: Re: [PATCH v5 3/8] dt-bindings: clock: add Qualcomm IPQ5332 NSSCC
clock and reset definitions
On Thu, Aug 29, 2024 at 01:58:25PM +0530, Varadarajan Narayanan wrote:
> From: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
>
> Add NSSCC clock and reset definitions for Qualcomm IPQ5332.
> Enable interconnect provider ability for use by the ethernet
> driver.
>
> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
> Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
> ---
> v5: Marked #power-domain-cells as false
> Included #interconnect-cells
Then this might not be GCC-like clock controller or gcc.yaml
should not include power-domain-cells.
Best regards,
Krzysztof
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