netdev - Re: [PATCH v5 3/8] dt-bindings: clock: add Qualcomm IPQ5332 NSSCC clock and reset definitions

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <18399b69-235e-47f9-b876-45fb2a4766e4@kernel.org>
Date: Sat, 31 Aug 2024 12:01:13 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Varadarajan Narayanan <quic_varada@...cinc.com>, andersson@...nel.org,
 mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org, konradybcio@...nel.org,
 catalin.marinas@....com, will@...nel.org, djakov@...nel.org,
 richardcochran@...il.com, geert+renesas@...der.be,
 neil.armstrong@...aro.org, arnd@...db.de, nfraprado@...labora.com,
 linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-pm@...r.kernel.org,
 netdev@...r.kernel.org, Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
Subject: Re: [PATCH v5 3/8] dt-bindings: clock: add Qualcomm IPQ5332 NSSCC
 clock and reset definitions

On 31/08/2024 08:56, Dmitry Baryshkov wrote:
> On Sat, 31 Aug 2024 at 09:11, Krzysztof Kozlowski <krzk@...nel.org> wrote:
>>
>> On Thu, Aug 29, 2024 at 01:58:25PM +0530, Varadarajan Narayanan wrote:
>>> From: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
>>>
>>> Add NSSCC clock and reset definitions for Qualcomm IPQ5332.
>>> Enable interconnect provider ability for use by the ethernet
>>> driver.
>>>
>>> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
>>> Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
>>> ---
>>> v5: Marked #power-domain-cells as false
>>>     Included #interconnect-cells
>>
>> Then this might not be GCC-like clock controller or gcc.yaml
>> should not include power-domain-cells.
> 
> qcom,gcc.yaml already doesn't mark #power-domain-cells as required, so
> it should be fine. See qcom,gcc-apq8064.yaml or qcom,gcc-ipq4019.yaml.
> 

I know, I am not saying whether code is correct or not, but whether it
makes sense. If it does not have power domains, but instead interconnect
cells, maybe it should not be considered a "GCC" like block.

Best regards,
Krzysztof