netdev - Re: [PATCH can-next v5 03/20] arm64: dts: rockchip: mecsbc: add CAN0 and CAN1 interfaces

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Message-ID: <8027881.qOBuL9xsDt@diego>
Date: Wed, 04 Sep 2024 10:52:54 +0200
From: Heiko Stübner <heiko@...ech.de>
To: kernel@...gutronix.de, Alibek Omarov <a1ba.omarov@...il.com>,
 Vincent Mailhol <mailhol.vincent@...adoo.fr>,
 "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Philipp Zabel <p.zabel@...gutronix.de>,
 Elaine Zhang <zhangqing@...k-chips.com>,
 David Jander <david.jander@...tonic.nl>,
 Marc Kleine-Budde <mkl@...gutronix.de>
Cc: Simon Horman <horms@...nel.org>, linux-can@...r.kernel.org,
 netdev@...r.kernel.org, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
 linux-kernel@...r.kernel.org, Marc Kleine-Budde <mkl@...gutronix.de>,
 David Jander <david@...tonic.nl>
Subject:
 Re: [PATCH can-next v5 03/20] arm64: dts: rockchip: mecsbc: add CAN0 and CAN1
 interfaces

Am Mittwoch, 4. September 2024, 10:12:47 CEST schrieb Marc Kleine-Budde:
> From: David Jander <david@...tonic.nl>
> 
> This patch adds support for the CAN0 and CAN1 interfaces to the board.
> 
> Signed-off-by: David Jander <david@...tonic.nl>
> Tested-by: Alibek Omarov <a1ba.omarov@...il.com>
> Signed-off-by: Marc Kleine-Budde <mkl@...gutronix.de>
> ---
>  arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
> index c2dfffc638d1..052ef03694cf 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
> @@ -117,6 +117,20 @@ &cpu3 {
>  	cpu-supply = <&vdd_cpu>;
>  };
>  
> +&can0 {
> +	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&can0m0_pins>;
> +	status = "okay";
> +};
> +
> +&can1 {
> +	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&can1m1_pins>;
> +	status = "okay";
> +};
> +

cpu3 > can0 ... aka alphabetical sorting of phandles

Reviewed-by: Heiko Stuebner <heiko@...ech.de>

No need to resend for that though.

>  &gmac1 {
>  	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
>  	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
> 
>