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Message-Id: <20240904235456.2663335-1-quic_abchauha@quicinc.com>
Date: Wed, 4 Sep 2024 16:54:56 -0700
From: Abhishek Chauhan <quic_abchauha@...cinc.com>
To: Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>, netdev@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org,
Andrew Halaney <ahalaney@...hat.com>
Cc: kernel@...cinc.com
Subject: [PATCH net-next v1] net: stmmac: Programming sequence for VLAN packets with split header
Currently reset state configuration of split header works fine for
non-tagged packets and we see no corruption in payload of any size
We need additional programming sequence with reset configuration to
handle VLAN tagged packets to avoid corruption in payload for packets
of size greater than 256 bytes.
Without this change ping application complains about corruption
in payload when the size of the VLAN packet exceeds 256 bytes.
With this change tagged and non-tagged packets of any size works fine
and there is no corruption seen.
Signed-off-by: Abhishek Chauhan <quic_abchauha@...cinc.com>
---
Changes since v0
- The reason for posting it on net-next is to enable this new feature.
drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 9 +++++++++
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 11 +++++++++++
2 files changed, 20 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index 93a78fd0737b..4e340937dc78 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -44,6 +44,7 @@
#define GMAC_MDIO_DATA 0x00000204
#define GMAC_GPIO_STATUS 0x0000020C
#define GMAC_ARP_ADDR 0x00000210
+#define GMAC_EXT_CFG1 0x00000238
#define GMAC_ADDR_HIGH(reg) (0x300 + reg * 8)
#define GMAC_ADDR_LOW(reg) (0x304 + reg * 8)
#define GMAC_L3L4_CTRL(reg) (0x900 + (reg) * 0x30)
@@ -235,6 +236,14 @@ enum power_event {
#define GMAC_CONFIG_HDSMS_SHIFT 20
#define GMAC_CONFIG_HDSMS_256 (0x2 << GMAC_CONFIG_HDSMS_SHIFT)
+/* MAC extended config1 */
+#define GMAC_CONFIG1_SAVE_EN BIT(24)
+#define GMAC_CONFIG1_SPLM GENMASK(9, 8)
+#define GMAC_CONFIG1_SPLM_L2OFST_EN BIT(0)
+#define GMAC_CONFIG1_SPLM_SHIFT 8
+#define GMAC_CONFIG1_SAVO GENMASK(22, 16)
+#define GMAC_CONFIG1_SAVO_SHIFT 16
+
/* MAC HW features0 bitmap */
#define GMAC_HW_FEAT_SAVLANINS BIT(27)
#define GMAC_HW_FEAT_ADDMAC BIT(18)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
index e0165358c4ac..dbd1be4e4a92 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -526,6 +526,17 @@ static void dwmac4_enable_sph(struct stmmac_priv *priv, void __iomem *ioaddr,
value |= GMAC_CONFIG_HDSMS_256; /* Segment max 256 bytes */
writel(value, ioaddr + GMAC_EXT_CONFIG);
+ /* Additional configuration to handle VLAN tagged packets */
+ value = readl(ioaddr + GMAC_EXT_CFG1);
+ value &= ~GMAC_CONFIG1_SPLM;
+ /* Enable Split mode for header and payload at L2 */
+ value |= GMAC_CONFIG1_SPLM_L2OFST_EN << GMAC_CONFIG1_SPLM_SHIFT;
+ value &= ~GMAC_CONFIG1_SAVO;
+ /* Enables the MAC to distinguish between tagged vs untagged pkts */
+ value |= 4 << GMAC_CONFIG1_SAVO_SHIFT;
+ value |= GMAC_CONFIG1_SAVE_EN;
+ writel(value, ioaddr + GMAC_EXT_CFG1);
+
value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan));
if (en)
value |= DMA_CONTROL_SPH;
--
2.25.1
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