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Message-ID: <20240905164447.GA391162@bhelgaas>
Date: Thu, 5 Sep 2024 11:44:47 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Wei Huang <wei.huang2@....com>
Cc: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
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Subject: Re: [PATCH V4 00/12] PCIe TPH and cache direct injection support
On Thu, Sep 05, 2024 at 10:45:57AM -0500, Wei Huang wrote:
> On 9/4/24 15:20, Bjorn Helgaas wrote:
> > To me, this series would make more sense if we squashed these
> > together:
> >
> > PCI: Introduce PCIe TPH support framework
> > PCI: Add TPH related register definition
> > PCI/TPH: Add pcie_enable_tph() to enable TPH
> > PCI/TPH: Add pcie_disable_tph() to disable TPH
> > PCI/TPH: Add save/restore support for TPH
> >
> > These would add the "minimum viable functionality", e.g., enable TPH
> > just for Processing Hints, with no Steering Tag support at all. Would
> > also include "pci=notph".
>
> > PCI/TPH: Add pcie_tph_set_st_entry() to set ST tag
> > PCI/TPH: Add pcie_tph_get_cpu_st() to get ST tag
> >
> > And squash these also to add Steering Tag support in a single commit,
> > including enhancing the save/restore.
>
> Can you elaborate on save/restore enhancement? Assuming that the first
> combined patch will have save/restore support as suggested. Are you
> talking about the ST entries save/restore as the enhancements (see
> below), because the second combined patch deals with ST?
>
> st_entry = (u16 *)cap;
> offset = PCI_TPH_BASE_SIZEOF;
> num_entries = get_st_table_size(pdev);
> for (i = 0; i < num_entries; i++) {
> pci_write_config_word(pdev, pdev->tph_cap + offset,
> *st_entry++);
> offset += sizeof(u16);
> }
I meant that since the first patch knows nothing about ST, it would
save/restore TPH control but not the ST entries.
The second patch would add ST support and also add save/restore of the
ST entries.
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