netdev - Re: [PATCH net-next 2/5] eth: fbnic: add initial PHC support

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Message-ID: <006042c0-e1d5-4fbc-aa7f-94a74cfbef0e@lunn.ch>
Date: Wed, 11 Sep 2024 18:25:11 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Vadim Fedorenko <vadfed@...a.com>
Cc: Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
	Jakub Kicinski <kuba@...nel.org>, David Ahern <dsahern@...nel.org>,
	Paolo Abeni <pabeni@...hat.com>,
	"David S. Miller" <davem@...emloft.net>,
	Alexander Duyck <alexanderduyck@...com>, netdev@...r.kernel.org
Subject: Re: [PATCH net-next 2/5] eth: fbnic: add initial PHC support

It appears that Richard has not been Cc:ed.

> +/* Precision Time Protocol Registers */
> +#define FBNIC_CSR_START_PTP		0x04800 /* CSR section delimiter */
> +#define FBNIC_PTP_REG_BASE		0x04800		/* 0x12000 */
> +
> +#define FBNIC_PTP_CTRL			0x04800		/* 0x12000 */
> +#define FBNIC_PTP_CTRL_EN			CSR_BIT(0)
> +#define FBNIC_PTP_CTRL_MONO_EN			CSR_BIT(4)
> +#define FBNIC_PTP_CTRL_TQS_OUT_EN		CSR_BIT(8)
> +#define FBNIC_PTP_CTRL_MAC_OUT_IVAL		CSR_GENMASK(16, 12)
> +#define FBNIC_PTP_CTRL_TICK_IVAL		CSR_GENMASK(23, 20)
> +
> +#define FBNIC_PTP_ADJUST		0x04801		/* 0x12004 */
> +#define FBNIC_PTP_ADJUST_INIT			CSR_BIT(0)
> +#define FBNIC_PTP_ADJUST_SUB_NUDGE		CSR_BIT(8)
> +#define FBNIC_PTP_ADJUST_ADD_NUDGE		CSR_BIT(16)
> +#define FBNIC_PTP_ADJUST_ADDEND_SET		CSR_BIT(24)
> +
> +#define FBNIC_PTP_INIT_HI		0x04802		/* 0x12008 */
> +#define FBNIC_PTP_INIT_LO		0x04803		/* 0x1200c */
> +
> +#define FBNIC_PTP_NUDGE_NS		0x04804		/* 0x12010 */
> +#define FBNIC_PTP_NUDGE_SUBNS		0x04805		/* 0x12014 */
> +
> +#define FBNIC_PTP_ADD_VAL_NS		0x04806		/* 0x12018 */
> +#define FBNIC_PTP_ADD_VAL_NS_MASK		CSR_GENMASK(15, 0)
> +#define FBNIC_PTP_ADD_VAL_SUBNS		0x04807	/* 0x1201c */
> +
> +#define FBNIC_PTP_CTR_VAL_HI		0x04808		/* 0x12020 */
> +#define FBNIC_PTP_CTR_VAL_LO		0x04809		/* 0x12024 */
> +
> +#define FBNIC_PTP_MONO_PTP_CTR_HI	0x0480a		/* 0x12028 */
> +#define FBNIC_PTP_MONO_PTP_CTR_LO	0x0480b		/* 0x1202c */
> +
> +#define FBNIC_PTP_CDC_FIFO_STATUS	0x0480c		/* 0x12030 */
> +#define FBNIC_PTP_SPARE			0x0480d		/* 0x12034 */
> +#define FBNIC_CSR_END_PTP		0x0480d /* CSR section delimiter */

We know the PCS is a licensed block. Is this also licensed? Should it
be placed in driver/ptp so others who licence the same block can
re-uses it?

> +/* FBNIC timing & PTP implementation
> + * Datapath uses truncated 40b timestamps for scheduling and event reporting.
> + * We need to promote those to full 64b, hence we periodically cache the top
> + * 32bit of the HW time counter. Since this makes our time reporting non-atomic
> + * we leave the HW clock free running and adjust time offsets in SW as needed.
> + * Time offset is 64bit - we need a seq counter for 32bit machines.
> + * Time offset and the cache of top bits are independent so we don't need
> + * a coherent snapshot of both - READ_ONCE()/WRITE_ONCE() + writer side lock
> + * are enough.
> + *
> + * TBD: alias u64_stats_sync & co. with some more appropriate names upstream.

This is upstream, so maybe now is a good time to decide?

	Andrew