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Message-ID: <3D0F65E42817C96F+20240912025539.1928223-2-wangyuli@uniontech.com>
Date: Thu, 12 Sep 2024 10:55:06 +0800
From: WangYuli <wangyuli@...ontech.com>
To: stable@...r.kernel.org,
	gregkh@...uxfoundation.org,
	sashal@...nel.org,
	william.qiu@...rfivetech.com,
	emil.renner.berthing@...onical.com,
	conor.dooley@...rochip.com,
	wangyuli@...ontech.com,
	xingyu.wu@...rfivetech.com,
	walker.chen@...rfivetech.com,
	robh@...nel.org,
	hal.feng@...rfivetech.com
Cc: kernel@...il.dk,
	robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org,
	conor+dt@...nel.org,
	paul.walmsley@...ive.com,
	palmer@...belt.com,
	aou@...s.berkeley.edu,
	devicetree@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	richardcochran@...il.com,
	netdev@...r.kernel.org
Subject: [PATCH 6.6 v2 2/4] riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1

From: Xingyu Wu <xingyu.wu@...rfivetech.com>

[ Upstream commit 4e1abae5688aae9dd8345dbd4ea92a4b9adf340d ]

These pins are actually I2STX1 clock input, not I2STX0,
so their names should be changed.

Signed-off-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
Reviewed-by: Walker Chen <walker.chen@...rfivetech.com>
Acked-by: Rob Herring <robh@...nel.org>
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
Signed-off-by: WangYuli <wangyuli@...ontech.com>
---
 arch/riscv/boot/dts/starfive/jh7110-pinfunc.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h
index fb0139b56723..256de17f5261 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h
+++ b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h
@@ -240,8 +240,8 @@
 #define GPI_SYS_MCLK_EXT			30
 #define GPI_SYS_I2SRX_BCLK			31
 #define GPI_SYS_I2SRX_LRCK			32
-#define GPI_SYS_I2STX0_BCLK			33
-#define GPI_SYS_I2STX0_LRCK			34
+#define GPI_SYS_I2STX1_BCLK			33
+#define GPI_SYS_I2STX1_LRCK			34
 #define GPI_SYS_TDM_CLK				35
 #define GPI_SYS_TDM_RXD				36
 #define GPI_SYS_TDM_SYNC			37
-- 
2.43.4


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