lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <7b62997c-2b27-2cc0-ebe7-3ef17b51e596@amd.com>
Date: Mon, 16 Sep 2024 17:23:44 +0100
From: Alejandro Lucero Palau <alucerop@....com>
To: Jonathan Cameron <Jonathan.Cameron@...wei.com>,
 alejandro.lucero-palau@....com
Cc: linux-cxl@...r.kernel.org, netdev@...r.kernel.org,
 dan.j.williams@...el.com, martin.habets@...inx.com, edward.cree@....com,
 davem@...emloft.net, kuba@...nel.org, pabeni@...hat.com, edumazet@...gle.com
Subject: Re: [PATCH v3 20/20] efx: support pio mapping based on cxl


On 9/13/24 19:10, Jonathan Cameron wrote:
> On Sat, 7 Sep 2024 09:18:36 +0100
> alejandro.lucero-palau@....com wrote:
>
>> From: Alejandro Lucero <alucerop@....com>
>>
>> With a device supporting CXL and successfully initialised, use the cxl
>> region to map the memory range and use this mapping for PIO buffers.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@....com>
> One trivial thing.
>
>> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
>> index dd2dbfb8ba15..ef57f833b8a7 100644
>> --- a/drivers/net/ethernet/sfc/efx_cxl.c
>> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
>> @@ -21,9 +21,9 @@
>>   int efx_cxl_init(struct efx_nic *efx)
>>   {
>>   	struct pci_dev *pci_dev = efx->pci_dev;
>> +	resource_size_t start, end, max = 0;
>>   	struct efx_cxl *cxl;
>>   	struct resource res;
>> -	resource_size_t max;
>>   	u16 dvsec;
>>   	int rc;
>>   
>> @@ -132,10 +132,27 @@ int efx_cxl_init(struct efx_nic *efx)
>>   		goto err_region;
>>   	}
>>   
>> +	rc = cxl_get_region_params(cxl->efx_region, &start, &end);
>> +	if (rc) {
>> +		pci_err(pci_dev, "CXL getting regions params failed");
>> +		goto err_map;
>> +	}
>> +
>> +	cxl->ctpio_cxl = ioremap(start, end - start);
>> +	if (!cxl->ctpio_cxl) {
>> +		pci_err(pci_dev, "CXL ioremap region failed");
>> +		rc = -EIO;
>> +		goto err_map;
>> +	}
>> +
>> +	efx->efx_cxl_pio_initialised = true;
>> +
>>   	cxl_release_endpoint(cxl->cxlmd, cxl->endpoint);
>>   
>>   	return 0;
>>   
>> +err_map:
>> +		cxl_region_detach(cxl->cxled);
> Odd looking indent.


I'll fix it.

Thanks!


>>   err_region:
>>   	cxl_dpa_free(efx->cxl->cxled);
>>   err_release:

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ