netdev - Re: [PATCH 2/5] net: phy: dp83tg720: Added SGMII Support

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Message-ID: <fb07f305-e01b-455f-9568-8a62d54b63e2@lunn.ch>
Date: Thu, 19 Sep 2024 23:12:41 +0200
From: Andrew Lunn <andrew@...n.ch>
To: "Alvaro (Al-vuh-roe) Reyes" <a-reyes1@...com>
Cc: netdev@...r.kernel.org, hkallweit1@...il.com, linux@...linux.org.uk,
	maxime.chevallier@...tlin.com, o.rempel@...gutronix.de,
	spatton@...com, r-kommineni@...com, e-mayhew@...com,
	praneeth@...com, p-varis@...com, d-qiu@...com
Subject: Re: [PATCH 2/5] net: phy: dp83tg720: Added SGMII Support

> +#define MMD1F							0x1f
> +#define MMD1							0x1

MDIO_MMD_VEND2 and MDIO_MMD_PMAPMD. But i don't think MMD1 is used?

> +
>  /* MDIO_MMD_VEND2 registers */
>  #define DP83TG720_MII_REG_10			0x10
>  #define DP83TG720_STS_MII_INT			BIT(7)
> @@ -69,6 +72,13 @@

It looks like the SGMII register goes here, since it is in
MDIO_MMD_VEND2.

	Andrew