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Message-ID: <20240929101949.723658-1-me@shenghaoyang.info>
Date: Sun, 29 Sep 2024 18:19:44 +0800
From: Shenghao Yang <me@...nghaoyang.info>
To: netdev@...r.kernel.org
Cc: Shenghao Yang <me@...nghaoyang.info>,
f.fainelli@...il.com,
olteanv@...il.com,
pavana.sharma@...i.com,
ashkan.boldaji@...i.com,
kabel@...nel.org,
andrew@...n.ch
Subject: [PATCH net 0/3] net: dsa: mv88e6xxx: fix MV88E6393X PHC frequency on internal clock
The MV88E6393X family of switches can additionally run their cycle
counters using a 250MHz internal clock instead of the usual 125MHz
externa clock [1].
The driver currently assumes all designs utilize that external clock,
but MikroTik's RB5009 uses the internal source - causing the PHC to be
seen running at 2x real time in userspace, making synchronization
with ptp4l impossible.
This series adds support for reading off the cycle counter frequency
known to the hardware in the TAI_CLOCK_PERIOD register and picking an
appropriate set of scaling coefficients instead of using a fixed set
for each switch family.
Patch 1 groups those cycle counter coefficients into a new structure to
make it easier to pass those around.
Patch 2 modifies PTP initialization to probe TAI_CLOCK_PERIOD and
use an appropriate set of coefficients.
Patch 3 adds support for 4000ps cycle counter periods.
Thanks,
Shenghao
[1] https://lore.kernel.org/netdev/d6622575-bf1b-445a-b08f-2739e3642aae@lunn.ch/
Shenghao Yang (3):
net: dsa: mv88e6xxx: group cycle counter coefficients
net: dsa: mv88e6xxx: read cycle counter period from hardware
net: dsa: mv88e6xxx: support 4000ps cycle counter periods
drivers/net/dsa/mv88e6xxx/chip.h | 7 +--
drivers/net/dsa/mv88e6xxx/ptp.c | 105 +++++++++++++++++++++----------
2 files changed, 75 insertions(+), 37 deletions(-)
--
2.46.1
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