netdev - Re: [PATCH v6 3/7] misc: Add support for LAN966x PCI device

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Message-Id: <b4602de6-bf45-4daf-8b52-f06cc6ff67ef@app.fastmail.com>
Date: Wed, 02 Oct 2024 11:08:15 +0000
From: "Arnd Bergmann" <arnd@...db.de>
To: "Herve Codina" <herve.codina@...tlin.com>,
 "Geert Uytterhoeven" <geert@...ux-m68k.org>,
 "Andy Shevchenko" <andy.shevchenko@...il.com>,
 "Simon Horman" <horms@...nel.org>, "Lee Jones" <lee@...nel.org>,
 "derek.kiernan@....com" <derek.kiernan@....com>,
 "dragan.cvetic@....com" <dragan.cvetic@....com>,
 "Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
 "Bjorn Helgaas" <bhelgaas@...gle.com>,
 "Philipp Zabel" <p.zabel@...gutronix.de>,
 "Lars Povlsen" <lars.povlsen@...rochip.com>,
 "Steen Hegelund" <Steen.Hegelund@...rochip.com>,
 "Daniel Machon" <daniel.machon@...rochip.com>, UNGLinuxDriver@...rochip.com,
 "Rob Herring" <robh@...nel.org>, "Krzysztof Kozlowski" <krzk+dt@...nel.org>,
 "Conor Dooley" <conor+dt@...nel.org>,
 "Saravana Kannan" <saravanak@...gle.com>
Cc: "David S . Miller" <davem@...emloft.net>,
 "Eric Dumazet" <edumazet@...gle.com>, "Jakub Kicinski" <kuba@...nel.org>,
 "Paolo Abeni" <pabeni@...hat.com>,
 "Horatiu Vultur" <horatiu.vultur@...rochip.com>,
 "Andrew Lunn" <andrew@...n.ch>, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, Netdev <netdev@...r.kernel.org>,
 linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 "Allan Nielsen" <allan.nielsen@...rochip.com>,
 "Luca Ceresoli" <luca.ceresoli@...tlin.com>,
 "Thomas Petazzoni" <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v6 3/7] misc: Add support for LAN966x PCI device

On Mon, Sep 30, 2024, at 12:15, Herve Codina wrote:

> +			pci-ep-bus@0 {
> +				compatible = "simple-bus";
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +
> +				/*
> +				 * map @0xe2000000 (32MB) to BAR0 (CPU)
> +				 * map @0xe0000000 (16MB) to BAR1 (AMBA)
> +				 */
> +				ranges = <0xe2000000 0x00 0x00 0x00 0x2000000
> +				          0xe0000000 0x01 0x00 0x00 0x1000000>;

I was wondering about how this fits into the PCI DT
binding, is this a child of the PCI device, or does the
"pci-ep-bus" refer to the PCI device itself?

Where do the "0x01 0x00 0x00" and "0x00 0x00 0x00" addresses
come from? Shouldn't those be "02000010 0x00 0x00" and
"02000014 0x00 0x00" to refer to the first and second
relocatable 32-bit memory BAR?

     Arnd