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Message-ID: <20241004-b4-sparx5-lan969x-switch-driver-v2-7-d3290f581663@microchip.com>
Date: Fri, 4 Oct 2024 15:19:33 +0200
From: Daniel Machon <daniel.machon@...rochip.com>
To: "David S. Miller" <davem@...emloft.net>, Eric Dumazet
	<edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni
	<pabeni@...hat.com>, Lars Povlsen <lars.povlsen@...rochip.com>, "Steen
 Hegelund" <Steen.Hegelund@...rochip.com>, <horatiu.vultur@...rochip.com>,
	<jensemil.schulzostergaard@...rochip.com>, <UNGLinuxDriver@...rochip.com>,
	Richard Cochran <richardcochran@...il.com>, <horms@...nel.org>,
	<justinstitt@...gle.com>, <gal@...dia.com>, <aakash.r.menon@...il.com>,
	<jacob.e.keller@...el.com>, <ast@...erby.net>
CC: <netdev@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>
Subject: [PATCH net-next v2 07/15] net: sparx5: use SPX5_CONST for
 constants which do not have a symbol

Now that we have indentified all the chip constants, update the use of
them where a symbol is not defined for the constant.

Reviewed-by: Steen Hegelund <Steen.Hegelund@...rochip.com>
Signed-off-by: Daniel Machon <daniel.machon@...rochip.com>
---
 drivers/net/ethernet/microchip/sparx5/sparx5_main.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
index 1fa98158b0a8..6c50d7875207 100644
--- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
@@ -522,7 +522,7 @@ static int sparx5_init_coreclock(struct sparx5 *sparx5)
 		 sparx5,
 		 LRN_AUTOAGE_CFG_1);
 
-	for (idx = 0; idx < 3; idx++)
+	for (idx = 0; idx < sparx5->data->consts->n_sio_clks; idx++)
 		spx5_rmw(GCB_SIO_CLOCK_SYS_CLK_PERIOD_SET(clk_period / 100),
 			 GCB_SIO_CLOCK_SYS_CLK_PERIOD,
 			 sparx5,
@@ -550,16 +550,21 @@ static u32 qlim_wm(struct sparx5 *sparx5, int fraction)
 
 static int sparx5_qlim_set(struct sparx5 *sparx5)
 {
+	const struct sparx5_consts *consts = sparx5->data->consts;
 	u32 res, dp, prio;
 
 	for (res = 0; res < 2; res++) {
 		for (prio = 0; prio < 8; prio++)
 			spx5_wr(0xFFF, sparx5,
-				QRES_RES_CFG(prio + 630 + res * 1024));
+				QRES_RES_CFG(prio +
+					     consts->qres_max_prio_idx +
+					     res * 1024));
 
 		for (dp = 0; dp < 4; dp++)
 			spx5_wr(0xFFF, sparx5,
-				QRES_RES_CFG(dp + 638 + res * 1024));
+				QRES_RES_CFG(dp +
+					     consts->qres_max_colour_idx +
+					     res * 1024));
 	}
 
 	/* Set 80,90,95,100% of memory size for top watermarks */
@@ -605,7 +610,7 @@ static int sparx5_start(struct sparx5 *sparx5)
 	int err;
 
 	/* Setup own UPSIDs */
-	for (idx = 0; idx < 3; idx++) {
+	for (idx = 0; idx < consts->n_own_upsids; idx++) {
 		spx5_wr(idx, sparx5, ANA_AC_OWN_UPSID(idx));
 		spx5_wr(idx, sparx5, ANA_CL_OWN_UPSID(idx));
 		spx5_wr(idx, sparx5, ANA_L2_OWN_UPSID(idx));

-- 
2.34.1


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