netdev - RE: [Intel-wired-lan] [PATCH v12 iwl-next 5/7] ice: Add unified ice_capture

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Message-ID: <CYYPR11MB84298D9A8DB7D8CC265810D0BD722@CYYPR11MB8429.namprd11.prod.outlook.com>
Date: Fri, 4 Oct 2024 15:05:06 +0000
From: "Pucha, HimasekharX Reddy" <himasekharx.reddy.pucha@...el.com>
To: "Kolacinski, Karol" <karol.kolacinski@...el.com>,
	"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>
CC: "Keller, Jacob E" <jacob.e.keller@...el.com>, "netdev@...r.kernel.org"
	<netdev@...r.kernel.org>, "Kolacinski, Karol" <karol.kolacinski@...el.com>,
	"Nguyen, Anthony L" <anthony.l.nguyen@...el.com>, "Kitszel, Przemyslaw"
	<przemyslaw.kitszel@...el.com>
Subject: RE: [Intel-wired-lan] [PATCH v12 iwl-next 5/7] ice: Add unified
 ice_capture_crosststamp

> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@...osl.org> On Behalf Of Karol Kolacinski
> Sent: Monday, September 30, 2024 5:43 PM
> To: intel-wired-lan@...ts.osuosl.org
> Cc: Keller, Jacob E <jacob.e.keller@...el.com>; netdev@...r.kernel.org; Kolacinski, Karol <karol.kolacinski@...el.com>; Nguyen, Anthony L <anthony.l.nguyen@...el.com>; Kitszel, Przemyslaw <przemyslaw.kitszel@...el.com>
> Subject: [Intel-wired-lan] [PATCH v12 iwl-next 5/7] ice: Add unified ice_capture_crosststamp
>
> From: Jacob Keller <jacob.e.keller@...el.com>
>
> Devices supported by ice driver use essentially the same logic for performing a crosstimestamp. The only difference is that E830 hardware has different offsets. Instead of having multiple implementations, combine them into a single ice_capture_crosststamp() function.
>
> To support both hardware types, the ice_capture_crosststamp function must be able to determine the appropriate registers to access. To handle this, pass a custom context structure instead of the PF pointer. This structure, ice_crosststamp_ctx, contains a pointer to the PF, and a pointer to the device configuration structure. This new structure also will make it easier to implement historic snapshot support in a future commit.
>
> The device configuration structure is a static const data which defines the offsets and flags for the various registers. This includes the lock register, the cross timestamp control register, the upper and lower ART system time capture registers, and the upper and lower device time capture registers for each timer index.
>
> Use the configuration structure to access all of the registers in ice_capture_crosststamp(). Ensure that we don't over-run the device time array by checking that the timer index is 0 or 1. Previously this was simply assumed, and it would cause the device to read an incorrect and likely garbage register.
>
> It does feel like there should be a kernel interface for managing register offsets like this, but the closest thing I saw was <linux/regmap.h> which is interesting but not quite what we're looking for...
>
> Use rd32_poll_timeout() to read lock_reg and ctl_reg.
>
> Add snapshot system time for historic interpolation.
>
> Remove X86_FEATURE_ART and X86_FEATURE_TSC_KNOWN_FREQ from all E82X devices because those are SoCs, which will always have those features.
>
> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@...el.com>
> Signed-off-by: Jacob Keller <jacob.e.keller@...el.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@...el.com>
> ---
> V7 -> V8: Moved E830 cross timestamp handling to "ice: Implement PTP support for
>           E830 devices" and explained the rest of previous changes in the commit
>           description
> V4 -> V5: Removed unnecessary CPU features check for SoCs (E82X) and
>           X86_FEATURE_TSC_KNOWN_FREQ check for E830
>
>  drivers/net/ethernet/intel/ice/ice_ptp.c | 204 ++++++++++++++---------
>  1 file changed, 129 insertions(+), 75 deletions(-)
>

Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@...el.com> (A Contingent worker at Intel)