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Message-ID: <87h69o3tym.fsf@kurt.kurt.home>
Date: Mon, 07 Oct 2024 15:48:01 +0200
From: Kurt Kanzenbach <kurt@...utronix.de>
To: Maciej Fijalkowski <maciej.fijalkowski@...el.com>
Cc: Tony Nguyen <anthony.l.nguyen@...el.com>, Przemek Kitszel
 <przemyslaw.kitszel@...el.com>, "David S. Miller" <davem@...emloft.net>,
 Eric
 Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo
 Abeni <pabeni@...hat.com>, Alexei Starovoitov <ast@...nel.org>, Daniel
 Borkmann <daniel@...earbox.net>, Jesper Dangaard Brouer <hawk@...nel.org>,
 John Fastabend <john.fastabend@...il.com>, Richard Cochran
 <richardcochran@...il.com>, Sriram Yagnaraman
 <sriram.yagnaraman@...csson.com>, Benjamin Steinke
 <benjamin.steinke@...s-audio.com>, Sebastian Andrzej Siewior
 <bigeasy@...utronix.de>, intel-wired-lan@...ts.osuosl.org,
 netdev@...r.kernel.org, bpf@...r.kernel.org, Sriram Yagnaraman
 <sriram.yagnaraman@....tech>
Subject: Re: [PATCH iwl-next v7 5/5] igb: Add AF_XDP zero-copy Tx support

On Mon Oct 07 2024, Maciej Fijalkowski wrote:
>> +bool igb_xmit_zc(struct igb_ring *tx_ring)
>> +{
>> +	unsigned int budget = igb_desc_unused(tx_ring);
>> +	struct xsk_buff_pool *pool = tx_ring->xsk_pool;
>> +	u32 cmd_type, olinfo_status, nb_pkts, i = 0;
>> +	struct xdp_desc *descs = pool->tx_descs;
>> +	union e1000_adv_tx_desc *tx_desc = NULL;
>> +	struct igb_tx_buffer *tx_buffer_info;
>> +	unsigned int total_bytes = 0;
>> +	dma_addr_t dma;
>> +
>> +	if (!netif_carrier_ok(tx_ring->netdev))
>> +		return true;
>> +
>> +	if (test_bit(IGB_RING_FLAG_TX_DISABLED, &tx_ring->flags))
>> +		return true;
>> +
>> +	nb_pkts = xsk_tx_peek_release_desc_batch(pool, budget);
>> +	if (!nb_pkts)
>> +		return true;
>> +
>> +	while (nb_pkts-- > 0) {
>> +		dma = xsk_buff_raw_get_dma(pool, descs[i].addr);
>> +		xsk_buff_raw_dma_sync_for_device(pool, dma, descs[i].len);
>> +
>> +		tx_buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
>> +		tx_buffer_info->bytecount = descs[i].len;
>> +		tx_buffer_info->type = IGB_TYPE_XSK;
>> +		tx_buffer_info->xdpf = NULL;
>> +		tx_buffer_info->gso_segs = 1;
>> +		tx_buffer_info->time_stamp = jiffies;
>> +
>> +		tx_desc = IGB_TX_DESC(tx_ring, tx_ring->next_to_use);
>> +		tx_desc->read.buffer_addr = cpu_to_le64(dma);
>> +
>> +		/* put descriptor type bits */
>> +		cmd_type = E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_DEXT |
>> +			   E1000_ADVTXD_DCMD_IFCS;
>> +		olinfo_status = descs[i].len << E1000_ADVTXD_PAYLEN_SHIFT;
>> +
>> +		cmd_type |= descs[i].len | IGB_TXD_DCMD;
>
> I forgot if we spoke about this but you still set RS bit for each produced
> desc. Probably we agreed that since cleaning side is shared with 'slow'
> path it would be too much of an effort to address that?

Yes, and i believe we agreed that this needs to be addressed later, also
for igc.

>
> Could you add a FIXME/TODO here so that we won't lose this from our
> radars?

Sure.

Thanks,
Kurt

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