netdev - Re: [PATCH net-next v2 1/3] dt-bindings: net: emaclite: Add clock support

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Message-ID: <20241007-thinness-thaw-04e1f6f12615@spud>
Date: Mon, 7 Oct 2024 17:58:42 +0100
From: Conor Dooley <conor@...nel.org>
To: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
	pabeni@...hat.com, robh@...nel.org, krzk+dt@...nel.org,
	conor+dt@...nel.org, michal.simek@....com, harini.katakam@....com,
	netdev@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	git@....com, Abin Joseph <abin.joseph@....com>
Subject: Re: [PATCH net-next v2 1/3] dt-bindings: net: emaclite: Add clock
 support

On Mon, Oct 07, 2024 at 08:36:01PM +0530, Radhey Shyam Pandey wrote:
> From: Abin Joseph <abin.joseph@....com>
> 
> Add s_axi_aclk AXI4 clock support. Traditionally this IP was used on
> microblaze platforms which had fixed clocks enabled all the time. But
> since its a PL IP, it can also be used on SoC platforms like Zynq
> UltraScale+ MPSoC which combines processing system (PS) and user
> programmable logic (PL) into the same device. On these platforms instead
> of fixed enabled clocks it is mandatory to explicitly enable IP clocks
> for proper functionality.
> 
> So make clock a required property and also define max supported clock
> constraints.
> 
> Signed-off-by: Abin Joseph <abin.joseph@....com>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@....com>

Acked-by: Conor Dooley <conor.dooley@...rochip.com>

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