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Message-ID: <05fb18ef-1436-4864-a2e6-3cd7bb0123c1@lunn.ch>
Date: Tue, 8 Oct 2024 23:23:23 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Shenghao Yang <me@...nghaoyang.info>
Cc: netdev@...r.kernel.org, f.fainelli@...il.com, olteanv@...il.com,
pavana.sharma@...i.com, ashkan.boldaji@...i.com, kabel@...nel.org
Subject: Re: [PATCH net v2 3/3] net: dsa: mv88e6xxx: support 4000ps cycle
counter period
On Sun, Oct 06, 2024 at 10:59:47PM +0800, Shenghao Yang wrote:
> The MV88E6393X family of devices can run its cycle counter off
> an internal 250MHz clock instead of an external 125MHz one.
>
> Add support for this cycle counter period by adding another set
> of coefficients and lowering the periodic cycle counter read interval
> to compensate for faster overflows at the increased frequency.
>
> Otherwise, the PHC runs at 2x real time in userspace and cannot be
> synchronized.
>
> Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family")
> Signed-off-by: Shenghao Yang <me@...nghaoyang.info>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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