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<PAXPR04MB8510B4D6822C3A1AF463C9C988402@PAXPR04MB8510.eurprd04.prod.outlook.com>
Date: Fri, 18 Oct 2024 01:22:05 +0000
From: Wei Fang <wei.fang@....com>
To: Frank Li <frank.li@....com>
CC: "davem@...emloft.net" <davem@...emloft.net>, "edumazet@...gle.com"
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Subject: RE: [PATCH v3 net-next 03/13] dt-bindings: net: add bindings for NETC
blocks control
> -----Original Message-----
> From: Frank Li <frank.li@....com>
> Sent: 2024年10月18日 0:28
> To: Wei Fang <wei.fang@....com>
> Cc: davem@...emloft.net; edumazet@...gle.com; kuba@...nel.org;
> pabeni@...hat.com; robh@...nel.org; krzk+dt@...nel.org;
> conor+dt@...nel.org; Vladimir Oltean <vladimir.oltean@....com>; Claudiu
> Manoil <claudiu.manoil@....com>; Clark Wang <xiaoning.wang@....com>;
> christophe.leroy@...roup.eu; linux@...linux.org.uk; bhelgaas@...gle.com;
> horms@...nel.org; imx@...ts.linux.dev; netdev@...r.kernel.org;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> linux-pci@...r.kernel.org
> Subject: Re: [PATCH v3 net-next 03/13] dt-bindings: net: add bindings for NETC
> blocks control
>
> On Thu, Oct 17, 2024 at 03:46:27PM +0800, Wei Fang wrote:
> > Add bindings for NXP NETC blocks control. Usually, NETC has 2 blocks
> > of 64KB registers, integrated endpoint register block (IERB) and
> > privileged register block (PRB). IERB is used for pre-boot
> > initialization for all NETC devices, such as ENETC, Timer, EMDIO and
> > so on. And PRB controls global reset and global error handling for
> > NETC. Moreover, for the i.MX platform, there is also a NETCMIX block
> > for link configuration, such as MII protocol, PCS protocol, etc.
> >
> > Signed-off-by: Wei Fang <wei.fang@....com>
> > ---
> > v2 changes:
> > 1. Rephrase the commit message.
> > 2. Change unevaluatedProperties to additionalProperties.
> > 3. Remove the useless lables from examples.
> > v3 changes:
> > 1. Remove the items from clocks and clock-names, add maxItems to
> > clocks and rename the clock.
> > ---
> > .../bindings/net/nxp,netc-blk-ctrl.yaml | 105
> ++++++++++++++++++
> > 1 file changed, 105 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> > b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> > new file mode 100644
> > index 000000000000..5e67cc6ff0a1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> > @@ -0,0 +1,105 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/net/nxp,netc-blk-ctrl.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NETC Blocks Control
> > +
> > +description:
> > + Usually, NETC has 2 blocks of 64KB registers, integrated endpoint
> > +register
> > + block (IERB) and privileged register block (PRB). IERB is used for
> > +pre-boot
> > + initialization for all NETC devices, such as ENETC, Timer, EMIDO and so
> on.
> > + And PRB controls global reset and global error handling for NETC.
> > +Moreover,
> > + for the i.MX platform, there is also a NETCMIX block for link
> > +configuration,
> > + such as MII protocol, PCS protocol, etc.
> > +
> > +maintainers:
> > + - Wei Fang <wei.fang@....com>
> > + - Clark Wang <xiaoning.wang@....com>
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - nxp,imx95-netc-blk-ctrl
> > +
> > + reg:
> > + minItems: 2
> > + maxItems: 3
> > +
> > + reg-names:
> > + minItems: 2
> > + items:
> > + - const: ierb
> > + - const: prb
> > + - const: netcmix
> > +
> > + "#address-cells":
> > + const: 2
> > +
> > + "#size-cells":
> > + const: 2
> > +
> > + ranges: true
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + clock-names:
> > + const: ipg
> > +
> > + power-domains:
> > + maxItems: 1
> > +
> > +patternProperties:
> > + "^pcie@[0-9a-f]+$":
> > + $ref: /schemas/pci/host-generic-pci.yaml#
> > +
> > +required:
> > + - compatible
> > + - "#address-cells"
> > + - "#size-cells"
> > + - reg
> > + - reg-names
> > + - ranges
>
> Nit: need keep the same order as above
> - compatible
> - reg
> - reg-names
> - "#address-cells"
> - "#size-cells"
>
Okay, let me adjust the order in next version.
> Reviewed-by: Frank Li <Frank.Li@....com>
>
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + bus {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + netc-blk-ctrl@...e0000 {
> > + compatible = "nxp,imx95-netc-blk-ctrl";
> > + reg = <0x0 0x4cde0000 0x0 0x10000>,
> > + <0x0 0x4cdf0000 0x0 0x10000>,
> > + <0x0 0x4c81000c 0x0 0x18>;
> > + reg-names = "ierb", "prb", "netcmix";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > + clocks = <&scmi_clk 98>;
> > + clock-names = "ipg";
> > + power-domains = <&scmi_devpd 18>;
> > +
> > + pcie@...00000 {
> > + compatible = "pci-host-ecam-generic";
> > + reg = <0x0 0x4cb00000 0x0 0x100000>;
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + device_type = "pci";
> > + bus-range = <0x1 0x1>;
> > + ranges = <0x82000000 0x0 0x4cce0000 0x0
> 0x4cce0000 0x0 0x20000
> > + 0xc2000000 0x0 0x4cd10000 0x0
> 0x4cd10000
> > + 0x0 0x10000>;
> > +
> > + mdio@0,0 {
> > + compatible = "pci1131,ee00";
> > + reg = <0x010000 0 0 0 0>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > + };
> > + };
> > + };
> > --
> > 2.34.1
> >
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