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Message-ID: <ZxYc2I9vgVL8i4Dz@shell.armlinux.org.uk>
Date: Mon, 21 Oct 2024 10:20:24 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Andrew Lunn <andrew@...n.ch>
Cc: Abhishek Chauhan <quic_abchauha@...cinc.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Jose Abreu <joabreu@...opsys.com>,
	"David S . Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>, netdev@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org,
	Andrew Halaney <ahalaney@...hat.com>,
	Simon Horman <horms@...nel.org>, Jon Hunter <jonathanh@...dia.com>,
	kernel@...cinc.com
Subject: Re: [PATCH net v1] net: stmmac: Disable PCS Link and AN interrupt
 when PCS AN is disabled

On Sat, Oct 19, 2024 at 04:45:16AM +0200, Andrew Lunn wrote:
> On Fri, Oct 18, 2024 at 03:24:07PM -0700, Abhishek Chauhan wrote:
> > Currently we disable PCS ANE when the link speed is 2.5Gbps.
> > mac_link_up callback internally calls the fix_mac_speed which internally
> > calls stmmac_pcs_ctrl_ane to disable the ANE for 2.5Gbps.
> > 
> > We observed that the CPU utilization is pretty high. That is because
> > we saw that the PCS interrupt status line for Link and AN always remain
> > asserted. Since we are disabling the PCS ANE for 2.5Gbps it makes sense
> > to also disable the PCS link status and AN complete in the interrupt
> > enable register.
> > 
> > Interrupt storm Issue:-
> > [   25.465754][    C2] stmmac_pcs: Link Down
> > [   25.469888][    C2] stmmac_pcs: Link Down
> > [   25.474030][    C2] stmmac_pcs: Link Down
> > [   25.478164][    C2] stmmac_pcs: Link Down
> > [   25.482305][    C2] stmmac_pcs: Link Down
> 
> I don't know this code, so i cannot really comment if not enabling the
> interrupt is the correct fix or not. But generally an interrupt storm
> like this is cause because you are not acknowledging the interrupt
> correctly to clear its status. So rather than not enabling it, maybe
> you should check what is the correct way to clear the interrupt once
> it happens?

stmmac PCS support is total crap and shouldn't be used, or stmmac
should not be using phylink. It's one or the other. Blame Serge for
this mess.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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