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Message-ID: <20241025035520.1841792-1-quic_mmanikan@quicinc.com>
Date: Fri, 25 Oct 2024 09:25:13 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: <andersson@...nel.org>, <mturquette@...libre.com>, <sboyd@...nel.org>,
<robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<konradybcio@...nel.org>, <catalin.marinas@....com>, <will@...nel.org>,
<p.zabel@...gutronix.de>, <richardcochran@...il.com>,
<geert+renesas@...der.be>, <dmitry.baryshkov@...aro.org>,
<angelogioacchino.delregno@...labora.com>, <neil.armstrong@...aro.org>,
<arnd@...db.de>, <nfraprado@...labora.com>, <quic_anusha@...cinc.com>,
<quic_mmanikan@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
<linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
<netdev@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_varada@...cinc.com>
Subject: [PATCH v8 0/7] Add NSS clock controller support for IPQ9574
Add bindings, driver and devicetree node for networking sub system clock
controller on IPQ9574. Also add support for gpll0_out_aux clock
which serves as the parent for some nss clocks.
Depends upon [1]
[1] https://lore.kernel.org/linux-arm-msm/20241015-qcom_ipq_cmnpll-v4-0-27817fbe3505@quicinc.com/
Changes in V8:
- Include NSS Huayra alpha pll patch to resolve the error's reported here
https://lore.kernel.org/oe-kbuild-all/202410101431.tjpSRNTY-lkp@intel.com/
- Detailed change logs are added to the respective patches
V7 can be found at:
https://lore.kernel.org/linux-arm-msm/20241009074125.794997-1-quic_mmanikan@quicinc.com/
V6 can be found at:
https://lore.kernel.org/linux-arm-msm/20241004080332.853503-1-quic_mmanikan@quicinc.com/
V5 can be found at:
https://lore.kernel.org/linux-arm-msm/20240626143302.810632-1-quic_devipriy@quicinc.com/
V4 can be found at:
https://lore.kernel.org/linux-arm-msm/20240625070536.3043630-1-quic_devipriy@quicinc.com/
V3 can be found at:
https://lore.kernel.org/linux-arm-msm/20240129051104.1855487-1-quic_devipriy@quicinc.com/
V2 can be found at:
https://lore.kernel.org/linux-arm-msm/20230825091234.32713-1-quic_devipriy@quicinc.com/
Devi Priya (7):
clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL support for ipq9574
dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX
clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock
dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
clk: qcom: Add NSS clock Controller driver for IPQ9574
arm64: dts: qcom: ipq9574: Add nsscc node
arm64: defconfig: Build NSS Clock Controller driver for IPQ9574
.../bindings/clock/qcom,ipq9574-nsscc.yaml | 73 +
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 22 +
arch/arm64/configs/defconfig | 1 +
drivers/clk/qcom/Kconfig | 7 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clk-alpha-pll.c | 11 +
drivers/clk/qcom/clk-alpha-pll.h | 1 +
drivers/clk/qcom/gcc-ipq9574.c | 15 +
drivers/clk/qcom/nsscc-ipq9574.c | 3080 +++++++++++++++++
include/dt-bindings/clock/qcom,ipq9574-gcc.h | 1 +
.../dt-bindings/clock/qcom,ipq9574-nsscc.h | 152 +
.../dt-bindings/reset/qcom,ipq9574-nsscc.h | 134 +
12 files changed, 3498 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
create mode 100644 drivers/clk/qcom/nsscc-ipq9574.c
create mode 100644 include/dt-bindings/clock/qcom,ipq9574-nsscc.h
create mode 100644 include/dt-bindings/reset/qcom,ipq9574-nsscc.h
--
2.34.1
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