netdev - Re: [PATCH net-next v2 1/2] bnxt_en: cache only 24 bits of hw counter

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Message-ID: <CACKFLinXvPofmMG=oSF9AgnO2DLswsWQJuTErZdZ1K_L_agFpg@mail.gmail.com>
Date: Mon, 28 Oct 2024 09:18:32 -0700
From: Michael Chan <michael.chan@...adcom.com>
To: Vadim Fedorenko <vadim.fedorenko@...ux.dev>
Cc: Pavan Chebbi <pavan.chebbi@...adcom.com>, Jakub Kicinski <kuba@...nel.org>, 
	Andrew Lunn <andrew+netdev@...n.ch>, Paolo Abeni <pabeni@...hat.com>, 
	"David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org, 
	Richard Cochran <richardcochran@...il.com>
Subject: Re: [PATCH net-next v2 1/2] bnxt_en: cache only 24 bits of hw counter

On Sat, Oct 26, 2024 at 3:20 PM Vadim Fedorenko
<vadim.fedorenko@...ux.dev> wrote:

> Ok, BNXT_LO_TIMER_MASK/BNXT_HI_TIMER_MASK use 24 bits only. I don't see
> any reason to keep more bits out of 48 bit of counter and I tried to be
> consistent across the code. It doesn't matter in terms of performance
> should we shift 16 or 24 bits. But because there will be another version
> (I forgot to remove one variable), I can change the code to fill 32-bit
> field if you insist.

24-bit will be fine.  but please document that 8 bits will be used for
roll-over check.  Thanks.

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