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Message-ID: <20241030081157.966604-1-jiri@resnulli.us>
Date: Wed, 30 Oct 2024 09:11:55 +0100
From: Jiri Pirko <jiri@...nulli.us>
To: netdev@...r.kernel.org
Cc: davem@...emloft.net,
edumazet@...gle.com,
kuba@...nel.org,
pabeni@...hat.com,
donald.hunter@...il.com,
vadim.fedorenko@...ux.dev,
arkadiusz.kubalewski@...el.com,
saeedm@...dia.com,
leon@...nel.org,
tariqt@...dia.com,
maciejm@...dia.com
Subject: [PATCH net-next v4 0/2] dpll: expose clock quality level
From: Jiri Pirko <jiri@...dia.com>
Some device driver might know the quality of the clock it is running.
In order to expose the information to the user, introduce new netlink
attribute and dpll device op. Implement the op in mlx5 driver.
Example:
$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml --dump device-get
[{'clock-id': 13316852727532664826,
'clock-quality-level': ['itu-opt1-eeec'], <<<<<<<<<<<<<<<<<
'id': 0,
'lock-status': 'unlocked',
'lock-status-error': 'none',
'mode': 'manual',
'mode-supported': ['manual'],
'module-name': 'mlx5_dpll',
'type': 'eec'}]
---
v3->v4:
- changed clock-quality-level enum documentation to clearly talk about
holdover status.
- added documentation of clock-quality-level attribute to explain when
it can be put multiple times
v2->v3:
- changed "itu" prefix to "itu-opt1"
- changed driver op to pass bitmap to allow to set multiple qualities
and pass it to user over multiple attrs
- enhanced the documentation a bit
v1->v2:
- extended quality enum documentation
- added "itu" prefix to the enum values
Jiri Pirko (2):
dpll: add clock quality level attribute and op
net/mlx5: DPLL, Add clock quality level op implementation
Documentation/netlink/specs/dpll.yaml | 41 ++++++++++
drivers/dpll/dpll_netlink.c | 24 ++++++
.../net/ethernet/mellanox/mlx5/core/dpll.c | 81 +++++++++++++++++++
include/linux/dpll.h | 4 +
include/uapi/linux/dpll.h | 24 ++++++
5 files changed, 174 insertions(+)
--
2.47.0
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