netdev - Re: Kernel panic with niu module

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Message-ID: <973e2e20-51d9-4fe4-a361-0e07bcf95bab@yahoo.com>
Date: Wed, 6 Nov 2024 10:04:40 -0600
From: Dullfire <dullfire@...oo.com>
To: Thomas Gleixner <tglx@...utronix.de>, Bjorn Helgaas <helgaas@...nel.org>
Cc: davem@...emloft.net, sparclinux@...r.kernel.org, netdev@...r.kernel.org,
 linux-pci@...r.kernel.org
Subject: Re: Kernel panic with niu module

> 7d5ec3d36123 had the mask_all() invocation _before_ setting up the the
> entries and reading back the descriptors. So that commit cannot break
> the niu device when your problem analysis is correct.

In 7d5ec3d36123 (and later) msix_mask_all() only writes to
PCI_MSIX_ENTRY_VECTOR_CTRL. I have tried all the MSIX registers, and only 
writes to PCI_MSIX_ENTRY_DATA were able to prevent a fatal trap on a read.
However the only write to PCI_MSIX_ENTRY_DATA I see is in
__pci_write_msi_msg() for 7d5ec3d36123, or pci_write_msg_msix(), in 6.11.5.

> 83dbf898a2d4 moved the mask_all() invocation after setting up MSI-X into
> the success path to handle a bonkers Marvell NVME device. That then
> matches your problem desription as the read proceeds the write.
>
> I've never heard of a similiar problem, so I'm pretty sure that's truly
> niu specific.
>
> Thanks,
>
>         tglx


Regards,
Jonathan Currier