netdev - Re: Kernel panic with niu module

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Message-ID: <7de14cca-e2fa-49f7-b83e-5f8322cc9e56@yahoo.com>
Date: Wed, 6 Nov 2024 16:12:48 -0600
From: Dullfire <dullfire@...oo.com>
To: Thomas Gleixner <tglx@...utronix.de>, Bjorn Helgaas <helgaas@...nel.org>
Cc: davem@...emloft.net, sparclinux@...r.kernel.org, netdev@...r.kernel.org,
 linux-pci@...r.kernel.org
Subject: Re: Kernel panic with niu module

On 11/6/24 11:32, Thomas Gleixner wrote:
> On Wed, Nov 06 2024 at 10:04, dullfire@...oo.com wrote:
>>> 7d5ec3d36123 had the mask_all() invocation _before_ setting up the the
>>> entries and reading back the descriptors. So that commit cannot break
>>> the niu device when your problem analysis is correct.
>>
>> In 7d5ec3d36123 (and later) msix_mask_all() only writes to
>> PCI_MSIX_ENTRY_VECTOR_CTRL. I have tried all the MSIX registers, and only
>> writes to PCI_MSIX_ENTRY_DATA were able to prevent a fatal trap on a read.
>> However the only write to PCI_MSIX_ENTRY_DATA I see is in
>> __pci_write_msi_msg() for 7d5ec3d36123, or pci_write_msg_msix(), in 6.11.5.
>
> Yuck. They really went a great lenght to make this hard to handle.
>
> Something like the obviously uncompiled below should work.
>
> Thanks,
>
>         tglx
> ---
> --- a/drivers/pci/msi/msi.c
> +++ b/drivers/pci/msi/msi.c
> @@ -611,6 +611,8 @@ void msix_prepare_msi_desc(struct pci_de
>  	if (desc->pci.msi_attrib.can_mask) {
>  		void __iomem *addr = pci_msix_desc_addr(desc);
>
> +		if (dev->dev_flags & PCI_MSIX_TOUCH_ENTRY_DATA_FIRST)
> +			writel(0x0, addr + PCI_MSIX_ENTRY_DATA);
>  		desc->pci.msix_ctrl = readl(addr + PCI_MSIX_ENTRY_VECTOR_CTRL);
>  	}
>  }
>
Great. Thanks for the recommendation. That is similar to my first patch
approach. I had see struct pci_dev's bit field members, but missed the
dev_flags member. I'll probably have a patch set out in the next few days,
mostly pending my schedule, and reviewing the patch submission process.


Regards,
Jonathan Currier