[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20241119081053.4175940-1-ciprianmarian.costea@oss.nxp.com>
Date: Tue, 19 Nov 2024 10:10:50 +0200
From: Ciprian Costea <ciprianmarian.costea@....nxp.com>
To: Marc Kleine-Budde <mkl@...gutronix.de>,
	Vincent Mailhol <mailhol.vincent@...adoo.fr>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	"David S . Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>,
	Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>
Cc: linux-can@...r.kernel.org,
	netdev@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	imx@...ts.linux.dev,
	NXP Linux Team <s32@....com>,
	Christophe Lizzi <clizzi@...hat.com>,
	Alberto Ruiz <aruizrui@...hat.com>,
	Enric Balletbo <eballetb@...hat.com>,
	Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
Subject: [PATCH 0/3] add FlexCAN support for S32G2/S32G3 SoCs
From: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
S32G2 and S32G3 SoCs share the FlexCAN module with i.MX SoCs, with some
hardware integration particularities.
Main difference covered by this patchset relates to interrupt management.
On S32G2/S32G3 SoC, there are separate interrupts for state change, bus
errors, MBs 0-7 and MBs 8-127 respectively.
Ciprian Marian Costea (3):
  dt-bindings: can: fsl,flexcan: add S32G2/S32G3 SoC support
  can: flexcan: add NXP S32G2/S32G3 SoC support
  can: flexcan: handle S32G2/S32G3 separate interrupt lines
 .../bindings/net/can/fsl,flexcan.yaml         | 25 +++++++++++++--
 drivers/net/can/flexcan/flexcan-core.c        | 31 +++++++++++++++++++
 drivers/net/can/flexcan/flexcan.h             |  3 ++
 3 files changed, 56 insertions(+), 3 deletions(-)
-- 
2.45.2
Powered by blists - more mailing lists
 
