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Message-ID: <727be6b0-02c0-49b8-bce2-8ebfccd08dd2@intel.com>
Date: Wed, 20 Nov 2024 14:43:22 -0800
From: "Tantilov, Emil S" <emil.s.tantilov@...el.com>
To: Alexander Lobakin <aleksander.lobakin@...el.com>
CC: <intel-wired-lan@...ts.osuosl.org>, <netdev@...r.kernel.org>,
<przemyslaw.kitszel@...el.com>, <sridhar.samudrala@...el.com>,
<rlance@...gle.com>, <decot@...gle.com>, <willemb@...gle.com>,
<joshua.a.hay@...el.com>, <anthony.l.nguyen@...el.com>,
<davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
<pabeni@...hat.com>
Subject: Re: [Intel-wired-lan] [PATCH iwl-net] idpf: add read memory barrier
when checking descriptor done bit
On 11/20/2024 8:29 AM, Alexander Lobakin wrote:
> From: Emil Tantilov <emil.s.tantilov@...el.com>
> Date: Thu, 14 Nov 2024 18:16:18 -0800
>
>> Add read memory barrier to ensure the order of operations when accessing
>> control queue descriptors. Specifically, we want to avoid cases where loads
>> can be reordered:
>>
>> 1. Load #1 is dispatched to read descriptor flags.
>> 2. Load #2 is dispatched to read some other field from the descriptor.
>> 3. Load #2 completes, accessing memory/cache at a point in time when the DD
>> flag is zero.
>> 4. NIC DMA overwrites the descriptor, now the DD flag is one.
>> 5. Any fields loaded before step 4 are now inconsistent with the actual
>> descriptor state.
>>
>> Add read memory barrier between steps 1 and 2, so that load #2 is not
>> executed until load has completed.
>>
>> Fixes: 8077c727561a ("idpf: add controlq init and reset checks")
>> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@...el.com>
>> Reviewed-by: Sridhar Samudrala <sridhar.samudrala@...el.com>
>> Suggested-by: Lance Richardson <rlance@...gle.com>
>> Signed-off-by: Emil Tantilov <emil.s.tantilov@...el.com>
>> ---
>> drivers/net/ethernet/intel/idpf/idpf_controlq.c | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq.c b/drivers/net/ethernet/intel/idpf/idpf_controlq.c
>> index 4849590a5591..61c7fafa54a1 100644
>> --- a/drivers/net/ethernet/intel/idpf/idpf_controlq.c
>> +++ b/drivers/net/ethernet/intel/idpf/idpf_controlq.c
>> @@ -375,6 +375,11 @@ int idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count,
>> desc = IDPF_CTLQ_DESC(cq, ntc);
>> if (!(le16_to_cpu(desc->flags) & IDPF_CTLQ_FLAG_DD))
>> break;
>
> I'd put an empty newline here.
OK
>
>> + /*
>> + * This barrier is needed to ensure that no other fields
>> + * are read until we check the DD flag.
>> + */
>
> Are you sure you need to copy this comment all over the place?
> If so (I don't remember whether checkpatch complains on barriers with no
It does, though it does not seem to check specifically for the dma_
versions (bug?) I think its good practice to include it.
> comment), maybe we could make it more compact to not waste space?
> Like
>
> /* Make sure no other fields are read until DD is set */
>
> 4x less lines, the same meaning.
Not quite, since the barrier does not guarantee DD being set, but I can
change it to:
/* Make sure no other fields are read until DD is checked */
>
>> + dma_rmb();
>>
>> /* strip off FW internal code */
>> desc_err = le16_to_cpu(desc->ret_val) & 0xff;
>> @@ -562,6 +567,11 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,
>>
>> if (!(flags & IDPF_CTLQ_FLAG_DD))
>> break;
>
> Same.
OK, will update in v2.
Thanks,
Emil
>
>> + /*
>> + * This barrier is needed to ensure that no other fields
>> + * are read until we check the DD flag.
>> + */
>> + dma_rmb();
>>
>> q_msg[i].vmvf_type = (flags &
>> (IDPF_CTLQ_FLAG_FTYPE_VM |
>
> Thanks,
> Olek
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