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Message-ID: <20241120-cheerful-aloof-marmoset-362573-mkl@pengutronix.de>
Date: Wed, 20 Nov 2024 10:01:30 +0100
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Ciprian Costea <ciprianmarian.costea@....nxp.com>
Cc: Vincent Mailhol <mailhol.vincent@...adoo.fr>,
Andrew Lunn <andrew+netdev@...n.ch>, "David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, linux-can@...r.kernel.org,
netdev@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
imx@...ts.linux.dev, NXP Linux Team <s32@....com>,
Christophe Lizzi <clizzi@...hat.com>, Alberto Ruiz <aruizrui@...hat.com>,
Enric Balletbo <eballetb@...hat.com>
Subject: Re: [PATCH 2/3] can: flexcan: add NXP S32G2/S32G3 SoC support
On 19.11.2024 10:10:52, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
>
> Add device type data for S32G2/S32G3 SoC.
>
> FlexCAN module from S32G2/S32G3 is similar with i.MX SoCs, but interrupt
> management is different. This initial S32G2/S32G3 SoC FlexCAN support
> paves the road to address such differences.
>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
If this flexcan integration has separate IRQ lines for Bus-Off and Error
IRQs, please add the FLEXCAN_QUIRK_NR_IRQ_3 in this initial patch.
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
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Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
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