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Message-Id:
<173249583016.3408383.9396476401419535053.git-patchwork-notify@kernel.org>
Date: Mon, 25 Nov 2024 00:50:30 +0000
From: patchwork-bot+netdevbpf@...nel.org
To: Pavan Chebbi <pavan.chebbi@...adcom.com>
Cc: davem@...emloft.net, michael.chan@...adcom.com, edumazet@...gle.com,
gospo@...adcom.com, kuba@...nel.org, netdev@...r.kernel.org,
pabeni@...hat.com, andrew+netdev@...n.ch, noureddine@...sta.com,
kalesh-anakkur.purayil@...adcom.com, somnath.kotur@...adcom.com
Subject: Re: [PATCH net] tg3: Set coherent DMA mask bits to 31 for BCM57766
chipsets
Hello:
This patch was applied to netdev/net.git (main)
by Jakub Kicinski <kuba@...nel.org>:
On Mon, 18 Nov 2024 21:57:41 -0800 you wrote:
> The hardware on Broadcom 1G chipsets have a known limitation
> where they cannot handle DMA addresses that cross over 4GB.
> When such an address is encountered, the hardware sets the
> address overflow error bit in the DMA status register and
> triggers a reset.
>
> However, BCM57766 hardware is setting the overflow bit and
> triggering a reset in some cases when there is no actual
> underlying address overflow. The hardware team analyzed the
> issue and concluded that it is happening when the status
> block update has an address with higher (b16 to b31) bits
> as 0xffff following a previous update that had lowest bits
> as 0xffff.
>
> [...]
Here is the summary with links:
- [net] tg3: Set coherent DMA mask bits to 31 for BCM57766 chipsets
https://git.kernel.org/netdev/net/c/614f4d166eee
You are awesome, thank you!
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