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Message-ID: <20241205-sparx5-lan969x-misc-fixes-v1-5-575ff3d0b022@microchip.com>
Date: Thu, 5 Dec 2024 14:54:28 +0100
From: Daniel Machon <daniel.machon@...rochip.com>
To: Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller"
	<davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski
	<kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Lars Povlsen
	<lars.povlsen@...rochip.com>, Steen Hegelund <Steen.Hegelund@...rochip.com>,
	<UNGLinuxDriver@...rochip.com>, Richard Cochran <richardcochran@...il.com>,
	Bjarni Jonasson <bjarni.jonasson@...rochip.com>,
	<jensemil.schulzostergaard@...rochip.com>, <horatiu.vultur@...rochip.com>,
	<arnd@...db.de>, <jacob.e.keller@...el.com>,
	<Parthiban.Veerasooran@...rochip.com>
CC: Calvin Owens <calvin@...nvd.org>, Muhammad Usama Anjum
	<Usama.Anjum@...labora.com>, <linux-kernel@...r.kernel.org>,
	<netdev@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: [PATCH net 5/5] net: sparx5: fix the maximum frame length register

On port initialization, we configure the maximum frame length accepted
by the receive module associated with the port. This value is currently
written to the MAX_LEN field of the DEV10G_MAC_ENA_CFG register, when in
fact, it should be written to the DEV10G_MAC_MAXLEN_CFG register. Fix
this.

Fixes: 946e7fd5053a ("net: sparx5: add port module support")
Signed-off-by: Daniel Machon <daniel.machon@...rochip.com>
---
 drivers/net/ethernet/microchip/sparx5/sparx5_port.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c
index 1401761c6251..f9d1a6bb9bff 100644
--- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c
+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c
@@ -1151,7 +1151,7 @@ int sparx5_port_init(struct sparx5 *sparx5,
 	spx5_inst_rmw(DEV10G_MAC_MAXLEN_CFG_MAX_LEN_SET(ETH_MAXLEN),
 		      DEV10G_MAC_MAXLEN_CFG_MAX_LEN,
 		      devinst,
-		      DEV10G_MAC_ENA_CFG(0));
+		      DEV10G_MAC_MAXLEN_CFG(0));
 
 	/* Handle Signal Detect in 10G PCS */
 	spx5_inst_wr(PCS10G_BR_PCS_SD_CFG_SD_POL_SET(sd_pol) |

-- 
2.34.1


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