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Message-ID: <1ad8ccdb-8621-42c7-b679-c6e67acb8396@gmail.com>
Date: Thu, 19 Dec 2024 21:13:02 +0100
From: Heiner Kallweit <hkallweit1@...il.com>
To: Hayes Wang <hayeswang@...ltek.com>, nic_swsd@...ltek.com,
davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
ChunHao Lin <hau@...ltek.com>
Subject: Re: [PATCH net-next] r8169: add support for RTL8125BP rev.b
On 19.12.2024 09:49, Hayes Wang wrote:
> From: ChunHao Lin <hau@...ltek.com>
>
> Add support for RTL8125BP rev.b. Its XID is 0x689. This chip supports
> DASH and its dash type is "RTL_DASH_25_BP".
>
Is this MAC version based on RTL8125B or RTL8125D?
I'm asking because this patch misses functionality which would be
typical for the two mentioned chip versions.
E.g. rtl8125_quirk_udp_padto() isn't enabled, what more indicates
a RTL8125D.
Is there any system out there yet with this new chip version?
> Signed-off-by: ChunHao Lin <hau@...ltek.com>
> ---
> drivers/net/ethernet/realtek/r8169.h | 1 +
> drivers/net/ethernet/realtek/r8169_main.c | 29 +++++++++++++++++++
> .../net/ethernet/realtek/r8169_phy_config.c | 23 +++++++++++++++
> 3 files changed, 53 insertions(+)
>
> diff --git a/drivers/net/ethernet/realtek/r8169.h b/drivers/net/ethernet/realtek/r8169.h
> index e0817f2a311a..7a194a8ab989 100644
> --- a/drivers/net/ethernet/realtek/r8169.h
> +++ b/drivers/net/ethernet/realtek/r8169.h
> @@ -70,6 +70,7 @@ enum mac_version {
> RTL_GIGA_MAC_VER_63,
> RTL_GIGA_MAC_VER_64,
> RTL_GIGA_MAC_VER_65,
> + RTL_GIGA_MAC_VER_66,
> RTL_GIGA_MAC_VER_70,
> RTL_GIGA_MAC_VER_71,
> RTL_GIGA_MAC_NONE
> diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
> index 5724f650f9c6..17ac50fcc9c8 100644
> --- a/drivers/net/ethernet/realtek/r8169_main.c
> +++ b/drivers/net/ethernet/realtek/r8169_main.c
> @@ -58,6 +58,7 @@
> #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
> #define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
> #define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
> +#define FIRMWARE_8125BP_2 "rtl_nic/rtl8125bp-2.fw"
> #define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
> #define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
>
> @@ -142,6 +143,7 @@ static const struct {
> [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
> [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
> [RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
> + [RTL_GIGA_MAC_VER_66] = {"RTL8125BP", FIRMWARE_8125BP_2},
> [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
> [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
> };
> @@ -632,6 +634,7 @@ enum rtl_dash_type {
> RTL_DASH_NONE,
> RTL_DASH_DP,
> RTL_DASH_EP,
> + RTL_DASH_25_BP,
> };
>
> struct rtl8169_private {
> @@ -1361,10 +1364,19 @@ static void rtl8168ep_driver_start(struct rtl8169_private *tp)
> rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
> }
>
> +static void rtl8125bp_driver_start(struct rtl8169_private *tp)
> +{
> + r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_START);
> + r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
> + r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
> +}
> +
> static void rtl8168_driver_start(struct rtl8169_private *tp)
> {
> if (tp->dash_type == RTL_DASH_DP)
> rtl8168dp_driver_start(tp);
> + else if (tp->dash_type == RTL_DASH_25_BP)
> + rtl8125bp_driver_start(tp);
> else
> rtl8168ep_driver_start(tp);
> }
> @@ -1385,10 +1397,19 @@ static void rtl8168ep_driver_stop(struct rtl8169_private *tp)
> rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
> }
>
> +static void rtl8125bp_driver_stop(struct rtl8169_private *tp)
> +{
> + r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_STOP);
> + r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
> + r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
> +}
> +
> static void rtl8168_driver_stop(struct rtl8169_private *tp)
> {
> if (tp->dash_type == RTL_DASH_DP)
> rtl8168dp_driver_stop(tp);
> + else if (tp->dash_type == RTL_DASH_25_BP)
> + rtl8125bp_driver_stop(tp);
> else
> rtl8168ep_driver_stop(tp);
> }
> @@ -1411,6 +1432,7 @@ static bool rtl_dash_is_enabled(struct rtl8169_private *tp)
> case RTL_DASH_DP:
> return r8168dp_check_dash(tp);
> case RTL_DASH_EP:
> + case RTL_DASH_25_BP:
> return r8168ep_check_dash(tp);
> default:
> return false;
> @@ -1425,6 +1447,8 @@ static enum rtl_dash_type rtl_get_dash_type(struct rtl8169_private *tp)
> return RTL_DASH_DP;
> case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_53:
> return RTL_DASH_EP;
> + case RTL_GIGA_MAC_VER_66:
> + return RTL_DASH_25_BP;
> default:
> return RTL_DASH_NONE;
> }
> @@ -2261,6 +2285,9 @@ static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
> { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
> { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
>
> + /* 8125BP family. */
> + { 0x7cf, 0x681, RTL_GIGA_MAC_VER_66 },
> +
> /* 8125D family. */
> { 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
> { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
> @@ -3842,6 +3869,7 @@ static void rtl_hw_config(struct rtl8169_private *tp)
> [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
> [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
> [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
> + [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
> [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
> [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
> };
> @@ -3861,6 +3889,7 @@ static void rtl_hw_start_8125(struct rtl8169_private *tp)
> case RTL_GIGA_MAC_VER_61:
> case RTL_GIGA_MAC_VER_64:
> case RTL_GIGA_MAC_VER_65:
> + case RTL_GIGA_MAC_VER_66:
> for (i = 0xa00; i < 0xb00; i += 4)
> RTL_W32(tp, i, 0);
> break;
> diff --git a/drivers/net/ethernet/realtek/r8169_phy_config.c b/drivers/net/ethernet/realtek/r8169_phy_config.c
> index 968c8a2185a4..cf95e579c65d 100644
> --- a/drivers/net/ethernet/realtek/r8169_phy_config.c
> +++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
> @@ -1102,6 +1102,28 @@ static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
> rtl8125_config_eee_phy(phydev);
> }
>
> +static void rtl8125bp_hw_phy_config(struct rtl8169_private *tp,
> + struct phy_device *phydev)
> +{
> + r8169_apply_firmware(tp);
> + rtl8168g_enable_gphy_10m(phydev);
> +
> + r8168g_phy_param(phydev, 0x8010, 0x0800, 0x0000);
> +
> + phy_write(phydev, 0x1f, 0x0b87);
> + phy_write(phydev, 0x16, 0x8088);
> + phy_modify(phydev, 0x17, 0xff00, 0x9000);
> + phy_write(phydev, 0x16, 0x808f);
> + phy_modify(phydev, 0x17, 0xff00, 0x9000);
> + phy_write(phydev, 0x1f, 0x0000);
> +
> + r8168g_phy_param(phydev, 0x8174, 0x2000, 0x1800);
> +
> + rtl8125_legacy_force_mode(phydev);
> + rtl8168g_disable_aldps(phydev);
> + rtl8125_config_eee_phy(phydev);
> +}
> +
> static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
> struct phy_device *phydev)
> {
> @@ -1163,6 +1185,7 @@ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
> [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
> [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
> [RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
> + [RTL_GIGA_MAC_VER_66] = rtl8125bp_hw_phy_config,
> [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
> [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
> };
What is the PHY ID of the integrated PHY? Is an extension to the Realtek PHY driver needed?
Under rtl_hw_config() you don't add an entry for the new chip version,
what doesn't feel right, e.g. MAC EEE isn't initialized.
Is this by intent?
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