netdev - Re: [PATCH v8 06/27] cxl: add function for type2 cxl regs setup

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Message-ID: <9d9f8f11-e008-634d-b125-dbf822b00c25@amd.com>
Date: Mon, 6 Jan 2025 15:19:39 +0000
From: Alejandro Lucero Palau <alucerop@....com>
To: Dan Carpenter <dan.carpenter@...aro.org>, oe-kbuild@...ts.linux.dev,
 alejandro.lucero-palau@....com, linux-cxl@...r.kernel.org,
 netdev@...r.kernel.org, dan.j.williams@...el.com, martin.habets@...inx.com,
 edward.cree@....com, davem@...emloft.net, kuba@...nel.org,
 pabeni@...hat.com, edumazet@...gle.com, dave.jiang@...el.com
Cc: lkp@...el.com, oe-kbuild-all@...ts.linux.dev
Subject: Re: [PATCH v8 06/27] cxl: add function for type2 cxl regs setup


On 1/6/25 10:41, Dan Carpenter wrote:
> Hi,
>
> kernel test robot noticed the following build warnings:
>
> url:    https://github.com/intel-lab-lkp/linux/commits/alejandro-lucero-palau-amd-com/cxl-add-type2-device-basic-support/20241217-001923
> base:   fac04efc5c793dccbd07e2d59af9f90b7fc0dca4
> patch link:    https://lore.kernel.org/r/20241216161042.42108-7-alejandro.lucero-palau%40amd.com
> patch subject: [PATCH v8 06/27] cxl: add function for type2 cxl regs setup
> config: arm64-randconfig-r072-20241225 (https://download.01.org/0day-ci/archive/20241227/202412270320.Aydp9B4U-lkp@intel.com/config)
> compiler: clang version 15.0.7 (https://github.com/llvm/llvm-project 8dfdcc7b7bf66834a761bd8de445840ef68e4d1a)
>
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp@...el.com>
> | Reported-by: Dan Carpenter <dan.carpenter@...aro.org>
> | Closes: https://lore.kernel.org/r/202412270320.Aydp9B4U-lkp@intel.com/
>
> smatch warnings:
> drivers/cxl/core/pci.c:1134 cxl_pci_accel_setup_regs() warn: missing error code? 'rc'
>
> vim +/rc +1134 drivers/cxl/core/pci.c
>
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1118  int cxl_pci_accel_setup_regs(struct pci_dev *pdev, struct cxl_dev_state *cxlds)
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1119  {
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1120  	int rc;
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1121
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1122  	rc = cxl_pci_setup_memdev_regs(pdev, cxlds);
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1123  	if (rc)
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1124  		return rc;
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1125
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1126  	rc = cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_COMPONENT,
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1127  				&cxlds->reg_map, cxlds->capabilities);
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1128  	if (rc) {
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1129  		dev_warn(&pdev->dev, "No component registers (%d)\n", rc);
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1130  		return rc;
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1131  	}
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1132
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1133  	if (!test_bit(CXL_CM_CAP_CAP_ID_RAS, cxlds->capabilities))
> cfbd1d00295bff Alejandro Lucero 2024-12-16 @1134  		return rc;
>
> This looks like it's supposed to be return -EPERM.


Not really. It is not an error if the device does not advertise it, and 
this return should be a return 0. It was pointed out by another review 
and it will be fixed in v10.

Thanks


> cfbd1d00295bff Alejandro Lucero 2024-12-16  1135
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1136  	rc = cxl_map_component_regs(&cxlds->reg_map,
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1137  				    &cxlds->regs.component,
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1138  				    BIT(CXL_CM_CAP_CAP_ID_RAS));
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1139  	if (rc)
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1140  		dev_dbg(&pdev->dev, "Failed to map RAS capability.\n");
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1141
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1142  	return rc;
> cfbd1d00295bff Alejandro Lucero 2024-12-16  1143  }
>