netdev - Re: [PATCH net-next v3 4/4] net: ngbe: Add support for 1PPS and TOD

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Message-ID: <Z4Kn-OtfLdScC38H@hoboy.vegasvil.org>
Date: Sat, 11 Jan 2025 09:18:48 -0800
From: Richard Cochran <richardcochran@...il.com>
To: Jiawen Wu <jiawenwu@...stnetic.com>
Cc: andrew+netdev@...n.ch, davem@...emloft.net, edumazet@...gle.com,
	kuba@...nel.org, pabeni@...hat.com, linux@...linux.org.uk,
	horms@...nel.org, jacob.e.keller@...el.com, netdev@...r.kernel.org,
	vadim.fedorenko@...ux.dev, mengyuanlou@...-swift.com
Subject: Re: [PATCH net-next v3 4/4] net: ngbe: Add support for 1PPS and TOD

On Fri, Jan 10, 2025 at 11:17:16AM +0800, Jiawen Wu wrote:

This code...

> +static void wx_ptp_setup_sdp(struct wx *wx)
> +{
...
> +	/* disable the pin first */
> +	wr32ptp(wx, WX_TSC_1588_AUX_CTL, 0);
> +	WX_WRITE_FLUSH(wx);
> +
> +	if (!test_bit(WX_FLAG_PTP_PPS_ENABLED, wx->flags)) {
> +		if (wx->pps_enabled) {
> +			wx->pps_enabled = false;
> +			wx_set_pps(wx, false, 0, 0);
> +		}
> +		return;
> +	}
> +
> +	wx->pps_enabled = true;
> +
> +	tssdp = WX_TSC_1588_SDP_FUN_SEL_TT0;
> +	tssdp |= WX_TSC_1588_SDP_OUT_LEVEL_H;
> +	tssdp1 = WX_TSC_1588_SDP_FUN_SEL_TS0;
> +	tsauxc = WX_TSC_1588_AUX_CTL_PLSG | WX_TSC_1588_AUX_CTL_EN_TT0 |
> +		WX_TSC_1588_AUX_CTL_EN_TT1 | WX_TSC_1588_AUX_CTL_EN_TS0;
> +
> +	/* Read the current clock time, and save the cycle counter value */
> +	spin_lock_irqsave(&wx->tmreg_lock, flags);
> +	ns = timecounter_read(&wx->hw_tc);
> +	wx->pps_edge_start = wx->hw_tc.cycle_last;
> +	spin_unlock_irqrestore(&wx->tmreg_lock, flags);
> +	wx->pps_edge_end = wx->pps_edge_start;
> +
> +	/* Figure out how far past the next second we are */
> +	div_u64_rem(ns, WX_NS_PER_SEC, &rem);
> +
> +	/* Figure out how many nanoseconds to add to round the clock edge up
> +	 * to the next full second
> +	 */
> +	rem = (WX_NS_PER_SEC - rem);
> +
> +	/* Adjust the clock edge to align with the next full second. */
> +	wx->pps_edge_start += div_u64(((u64)rem << cc->shift), cc->mult);
> +	trgttiml0 = (u32)wx->pps_edge_start;
> +	trgttimh0 = (u32)(wx->pps_edge_start >> 32);
> +
> +	wx_set_pps(wx, wx->pps_enabled, ns + rem, wx->pps_edge_start);
> +
> +	rem += wx->pps_width;
> +	wx->pps_edge_end += div_u64(((u64)rem << cc->shift), cc->mult);
> +	trgttiml1 = (u32)wx->pps_edge_end;
> +	trgttimh1 = (u32)(wx->pps_edge_end >> 32);
> +
> +	wr32ptp(wx, WX_TSC_1588_TRGT_L(0), trgttiml0);
> +	wr32ptp(wx, WX_TSC_1588_TRGT_H(0), trgttimh0);
> +	wr32ptp(wx, WX_TSC_1588_TRGT_L(1), trgttiml1);
> +	wr32ptp(wx, WX_TSC_1588_TRGT_H(1), trgttimh1);
> +	wr32ptp(wx, WX_TSC_1588_SDP(0), tssdp);
> +	wr32ptp(wx, WX_TSC_1588_SDP(1), tssdp1);
> +	wr32ptp(wx, WX_TSC_1588_AUX_CTL, tsauxc);
> +	wr32ptp(wx, WX_TSC_1588_INT_EN, WX_TSC_1588_INT_EN_TT1);
> +	WX_WRITE_FLUSH(wx);
> +
> +	rem = WX_NS_PER_SEC;
> +	/* Adjust the clock edge to align with the next full second. */
> +	wx->sec_to_cc = div_u64(((u64)rem << cc->shift), cc->mult);
> +}

Looks almost identical this code ...

> +void wx_ptp_check_pps_event(struct wx *wx)
> +{
...
> +	if (int_status & WX_TSC_1588_INT_ST_TT1) {
> +		/* disable the pin first */
> +		wr32ptp(wx, WX_TSC_1588_AUX_CTL, 0);
> +		WX_WRITE_FLUSH(wx);
> +
> +		tsauxc = WX_TSC_1588_AUX_CTL_PLSG | WX_TSC_1588_AUX_CTL_EN_TT0 |
> +			 WX_TSC_1588_AUX_CTL_EN_TT1 | WX_TSC_1588_AUX_CTL_EN_TS0;
> +
> +		/* Read the current clock time, and save the cycle counter value */
> +		spin_lock_irqsave(&wx->tmreg_lock, flags);
> +		ns = timecounter_read(&wx->hw_tc);
> +		wx->pps_edge_start = wx->hw_tc.cycle_last;
> +		spin_unlock_irqrestore(&wx->tmreg_lock, flags);
> +		wx->pps_edge_end = wx->pps_edge_start;
> +
> +		/* Figure out how far past the next second we are */
> +		div_u64_rem(ns, WX_NS_PER_SEC, &rem);
> +
> +		/* Figure out how many nanoseconds to add to round the clock edge up
> +		 * to the next full second
> +		 */
> +		rem = (WX_NS_PER_SEC - rem);
> +
> +		/* Adjust the clock edge to align with the next full second. */
> +		wx->pps_edge_start += div_u64(((u64)rem << cc->shift), cc->mult);
> +		trgttiml0 = (u32)wx->pps_edge_start;
> +		trgttimh0 = (u32)(wx->pps_edge_start >> 32);
> +
> +		rem += wx->pps_width;
> +		wx->pps_edge_end += div_u64(((u64)rem << cc->shift), cc->mult);
> +		trgttiml1 = (u32)wx->pps_edge_end;
> +		trgttimh1 = (u32)(wx->pps_edge_end >> 32);
> +
> +		wr32ptp(wx, WX_TSC_1588_TRGT_L(0), trgttiml0);
> +		wr32ptp(wx, WX_TSC_1588_TRGT_H(0), trgttimh0);
> +		wr32ptp(wx, WX_TSC_1588_TRGT_L(1), trgttiml1);
> +		wr32ptp(wx, WX_TSC_1588_TRGT_H(1), trgttimh1);
> +		wr32ptp(wx, WX_TSC_1588_AUX_CTL, tsauxc);
> +		WX_WRITE_FLUSH(wx);
> +	}
> +}

So can the trigger calculation logic be refactored into one place?

Thanks,
Richard