netdev - Re: [PATCH net-next 02/10] bnxt_en Refactor completion ring allocation logic for P5

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Message-ID: <Z4THzLTGKCgp/SUQ@mev-dev.igk.intel.com>
Date: Mon, 13 Jan 2025 08:59:08 +0100
From: Michal Swiatkowski <michal.swiatkowski@...ux.intel.com>
To: Michael Chan <michael.chan@...adcom.com>
Cc: davem@...emloft.net, netdev@...r.kernel.org, edumazet@...gle.com,
	kuba@...nel.org, pabeni@...hat.com, andrew+netdev@...n.ch,
	pavan.chebbi@...adcom.com, andrew.gospodarek@...adcom.com,
	somnath.kotur@...adcom.com,
	Ajit Khaparde <ajit.khaparde@...adcom.com>
Subject: Re: [PATCH net-next 02/10] bnxt_en Refactor completion ring
 allocation logic for P5_PLUS chips

On Sun, Jan 12, 2025 at 10:39:19PM -0800, Michael Chan wrote:
> Add a new bnxt_hwrm_cp_ring_alloc_p5() function to handle allocating
> one completion ring on P5_PLUS chips.  This simplifies the existing code
> and will be useful later in the series.
> 
> Reviewed-by: Ajit Khaparde <ajit.khaparde@...adcom.com>
> Signed-off-by: Michael Chan <michael.chan@...adcom.com>
> ---
>  drivers/net/ethernet/broadcom/bnxt/bnxt.c | 44 +++++++++++------------
>  1 file changed, 21 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
> index 8527788bed91..d364a707664b 100644
> --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
> +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
> @@ -7172,6 +7172,25 @@ static int bnxt_hwrm_rx_agg_ring_alloc(struct bnxt *bp,
>  	return 0;
>  }
>  
> +static int bnxt_hwrm_cp_ring_alloc_p5(struct bnxt *bp,
> +				      struct bnxt_cp_ring_info *cpr)
> +{
> +	struct bnxt_napi *bnapi = cpr->bnapi;
> +	u32 type = HWRM_RING_ALLOC_CMPL;
Nit, can be const

> +	struct bnxt_ring_struct *ring;
> +	u32 map_idx = bnapi->index;
> +	int rc;
> +
> +	ring = &cpr->cp_ring_struct;
> +	ring->handle = BNXT_SET_NQ_HDL(cpr);
> +	rc = hwrm_ring_alloc_send_msg(bp, ring, type, map_idx);
> +	if (rc)
> +		return rc;
> +	bnxt_set_db(bp, &cpr->cp_db, type, map_idx, ring->fw_ring_id);
> +	bnxt_db_cq(bp, &cpr->cp_db, cpr->cp_raw_cons);
> +	return 0;
> +}
> +
>  static int bnxt_hwrm_ring_alloc(struct bnxt *bp)
>  {
>  	bool agg_rings = !!(bp->flags & BNXT_FLAG_AGG_RINGS);
> @@ -7215,19 +7234,9 @@ static int bnxt_hwrm_ring_alloc(struct bnxt *bp)
>  		u32 map_idx;
>  
>  		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
> -			struct bnxt_cp_ring_info *cpr2 = txr->tx_cpr;
> -			struct bnxt_napi *bnapi = txr->bnapi;
> -			u32 type2 = HWRM_RING_ALLOC_CMPL;
> -
> -			ring = &cpr2->cp_ring_struct;
> -			ring->handle = BNXT_SET_NQ_HDL(cpr2);
> -			map_idx = bnapi->index;
> -			rc = hwrm_ring_alloc_send_msg(bp, ring, type2, map_idx);
> +			rc = bnxt_hwrm_cp_ring_alloc_p5(bp, txr->tx_cpr);
>  			if (rc)
>  				goto err_out;
> -			bnxt_set_db(bp, &cpr2->cp_db, type2, map_idx,
> -				    ring->fw_ring_id);
> -			bnxt_db_cq(bp, &cpr2->cp_db, cpr2->cp_raw_cons);
>  		}
>  		ring = &txr->tx_ring_struct;
>  		map_idx = i;
> @@ -7247,20 +7256,9 @@ static int bnxt_hwrm_ring_alloc(struct bnxt *bp)
>  		if (!agg_rings)
>  			bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod);
>  		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
> -			struct bnxt_cp_ring_info *cpr2 = rxr->rx_cpr;
> -			struct bnxt_napi *bnapi = rxr->bnapi;
> -			u32 type2 = HWRM_RING_ALLOC_CMPL;
> -			struct bnxt_ring_struct *ring;
> -			u32 map_idx = bnapi->index;
> -
> -			ring = &cpr2->cp_ring_struct;
> -			ring->handle = BNXT_SET_NQ_HDL(cpr2);
> -			rc = hwrm_ring_alloc_send_msg(bp, ring, type2, map_idx);
> +			rc = bnxt_hwrm_cp_ring_alloc_p5(bp, rxr->rx_cpr);
>  			if (rc)
>  				goto err_out;
> -			bnxt_set_db(bp, &cpr2->cp_db, type2, map_idx,
> -				    ring->fw_ring_id);
> -			bnxt_db_cq(bp, &cpr2->cp_db, cpr2->cp_raw_cons);
>  		}
>  	}
>  
> -- 
> 2.30.1

Nice simplification
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@...ux.intel.com>