netdev - RE: [Intel-wired-lan] [PATCH iwl-net v2] idpf: add read memory barrier when checking descriptor done bit

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Message-ID: <MW4PR11MB5911964A81E352AD36C63250BA182@MW4PR11MB5911.namprd11.prod.outlook.com>
Date: Tue, 14 Jan 2025 06:55:21 +0000
From: "Singh, Krishneil K" <krishneil.k.singh@...el.com>
To: "Tantilov, Emil S" <emil.s.tantilov@...el.com>,
	"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>, "Kitszel, Przemyslaw"
	<przemyslaw.kitszel@...el.com>, "Samudrala, Sridhar"
	<sridhar.samudrala@...el.com>, "rlance@...gle.com" <rlance@...gle.com>,
	"decot@...gle.com" <decot@...gle.com>, "willemb@...gle.com"
	<willemb@...gle.com>, "Hay, Joshua A" <joshua.a.hay@...el.com>, "Nguyen,
 Anthony L" <anthony.l.nguyen@...el.com>, "davem@...emloft.net"
	<davem@...emloft.net>, "edumazet@...gle.com" <edumazet@...gle.com>,
	"kuba@...nel.org" <kuba@...nel.org>, "pabeni@...hat.com" <pabeni@...hat.com>,
	"Lobakin, Aleksander" <aleksander.lobakin@...el.com>
Subject: RE: [Intel-wired-lan] [PATCH iwl-net v2] idpf: add read memory
 barrier when checking descriptor done bit


> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@...osl.org> On Behalf Of
> Emil Tantilov
> Sent: Thursday, November 21, 2024 8:41 PM
> To: intel-wired-lan@...ts.osuosl.org
> Cc: netdev@...r.kernel.org; Kitszel, Przemyslaw
> <przemyslaw.kitszel@...el.com>; Samudrala, Sridhar
> <sridhar.samudrala@...el.com>; rlance@...gle.com; decot@...gle.com;
> willemb@...gle.com; Hay, Joshua A <joshua.a.hay@...el.com>; Nguyen,
> Anthony L <anthony.l.nguyen@...el.com>; davem@...emloft.net;
> edumazet@...gle.com; kuba@...nel.org; pabeni@...hat.com; Lobakin,
> Aleksander <aleksander.lobakin@...el.com>
> Subject: [Intel-wired-lan] [PATCH iwl-net v2] idpf: add read memory barrier
> when checking descriptor done bit
> 
> Add read memory barrier to ensure the order of operations when accessing
> control queue descriptors. Specifically, we want to avoid cases where loads
> can be reordered:
> 
> 1. Load #1 is dispatched to read descriptor flags.
> 2. Load #2 is dispatched to read some other field from the descriptor.
> 3. Load #2 completes, accessing memory/cache at a point in time when the DD
>    flag is zero.
> 4. NIC DMA overwrites the descriptor, now the DD flag is one.
> 5. Any fields loaded before step 4 are now inconsistent with the actual
>    descriptor state.
> 
> Add read memory barrier between steps 1 and 2, so that load #2 is not
> executed until load #1 has completed.
> 
> Fixes: 8077c727561a ("idpf: add controlq init and reset checks")
> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@...el.com>
> Reviewed-by: Sridhar Samudrala <sridhar.samudrala@...el.com>
> Suggested-by: Lance Richardson <rlance@...gle.com>
> Signed-off-by: Emil Tantilov <emil.s.tantilov@...el.com>
> ---
> Changelog
> v2:
> - Rewrote comment to fit on a single line
> - Added new line as separator
> - Updated last sentence in commit message to include load #
> v1:
> https://lore.kernel.org/intel-wired-lan/20241115021618.20565-1-
> emil.s.tantilov@...el.com/
> ---
>  drivers/net/ethernet/intel/idpf/idpf_controlq.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
Tested-by: Krishneil Singh <krishneil.k.singh@...el.com>