netdev - Re: [PATCH v2 net-next] ixgbe: Fix endian handling for ACI descriptor registers

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Message-ID: <e3aebbad-42ec-44e5-b43d-b15b9cd0a9ad@intel.com>
Date: Mon, 20 Jan 2025 15:48:40 +0100
From: Przemek Kitszel <przemyslaw.kitszel@...el.com>
To: Simon Horman <horms@...nel.org>, Dheeraj Reddy Jonnalagadda
	<dheeraj.linuxdev@...il.com>, <michal.swiatkowski@...ux.intel.com>
CC: <anthony.l.nguyen@...el.com>, <piotr.kwapulinski@...el.com>,
	<andrew+netdev@...n.ch>, <davem@...emloft.net>, <edumazet@...gle.com>,
	<kuba@...nel.org>, <pabeni@...hat.com>, <intel-wired-lan@...ts.osuosl.org>,
	<netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 net-next] ixgbe: Fix endian handling for ACI descriptor
 registers

On 1/17/25 19:09, Simon Horman wrote:
> On Fri, Jan 17, 2025 at 11:01:22AM +0100, Przemek Kitszel wrote:
>> On 1/16/25 17:21, Simon Horman wrote:
>>> On Wed, Jan 15, 2025 at 09:11:17AM +0530, Dheeraj Reddy Jonnalagadda wrote:
>>>> The ixgbe driver was missing proper endian conversion for ACI descriptor
>>>> register operations. Add the necessary conversions when reading and
>>>> writing to the registers.
>>>>
>>>> Fixes: 46761fd52a88 ("ixgbe: Add support for E610 FW Admin Command Interface")
>>>> Closes: https://scan7.scan.coverity.com/#/project-view/52337/11354?selectedIssue=1602757
>>>> Signed-off-by: Dheeraj Reddy Jonnalagadda <dheeraj.linuxdev@...il.com>
>>>
>>> Hi Dheeraj,
>>>
>>> It seems that Sparse is not very happy about __le32 values appearing
>>> where u32 ones are expected. I wonder if something like what is below
>>> (compile tested only!) would both address the problem at hand and
>>> keep Sparse happy (even if negting much of it's usefulness by using casts).
>>>
>>> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
>>> index 6639069ad528..8b3787837128 100644
>>> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
>>> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
>>> @@ -150,6 +150,9 @@ static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value)
>>>    }
>>>    #define IXGBE_WRITE_REG(a, reg, value) ixgbe_write_reg((a), (reg), (value))
>>
>> Simon,
>>
>> As all ixgbe registers are LE, it would be beneficial to change
>> ixgbe_write_reg(), as @value should be __le32, (perhaps @reg too).
>> Similar for 64b.
> 
> Understood, sounds good to me.
> 
>> This clearly would not be a "fix" material, as all call sites should be
>> examined to check if they conform.
> 
> Sure, that also seems reasonable.
> But do you also think a more minimal fix is in order?
> 

@Dheeraj, do you want to hone your minimal fix to avoid sparse warnings?

follow up question: do you want to proceed with a full conversion?

@Michal is going to send patches that depend on this "full conversion"
next month, so he could also take care of the "full conversion".

>>
>>> +#define IXGBE_WRITE_REG_LE32(a, reg, value) \
>>> +	ixgbe_write_reg((a), (reg), (u32 __force)cpu_to_le32(value))
>>> +
>>