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Message-Id: <20250121082536.11752-1-zhaoqunqin@loongson.cn>
Date: Tue, 21 Jan 2025 16:25:36 +0800
From: Qunqin Zhao <zhaoqunqin@...ngson.cn>
To: kuba@...nel.org,
	andrew+netdev@...n.ch,
	davem@...emloft.net,
	edumazet@...gle.com,
	pabeni@...hat.com
Cc: chenhuacai@...nel.org,
	si.yanteng@...ux.dev,
	fancer.lancer@...il.com,
	netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Qunqin Zhao <zhaoqunqin@...ngson.cn>
Subject: [PATCH] net: stmmac: dwmac-loongson: Add fix_soc_reset function

Loongson's GMAC device takes nearly two seconds to complete DMA reset,
however, the default waiting time for reset is 200 milliseconds

Signed-off-by: Qunqin Zhao <zhaoqunqin@...ngson.cn>
---
 .../net/ethernet/stmicro/stmmac/dwmac-loongson.c    | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
index bfe6e2d631bd..35639d26256c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
@@ -516,6 +516,18 @@ static int loongson_dwmac_acpi_config(struct pci_dev *pdev,
 	return 0;
 }
 
+static int loongson_fix_soc_reset(void *priv, void __iomem *ioaddr)
+{
+	u32 value = readl(ioaddr + DMA_BUS_MODE);
+
+	value |= DMA_BUS_MODE_SFT_RESET;
+	writel(value, ioaddr + DMA_BUS_MODE);
+
+	return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value,
+				  !(value & DMA_BUS_MODE_SFT_RESET),
+				  10000, 2000000);
+}
+
 static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 {
 	struct plat_stmmacenet_data *plat;
@@ -566,6 +578,7 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id
 
 	plat->bsp_priv = ld;
 	plat->setup = loongson_dwmac_setup;
+	plat->fix_soc_reset = loongson_fix_soc_reset;
 	ld->dev = &pdev->dev;
 	ld->loongson_id = readl(res.addr + GMAC_VERSION) & 0xff;
 

base-commit: 5bc55a333a2f7316b58edc7573e8e893f7acb532
-- 
2.43.0


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