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Message-ID: <6f1126a7-b35a-4dc0-9c6e-29cfb6e7a145@linux.dev>
Date: Tue, 28 Jan 2025 02:11:36 +0800
From: Yanteng Si <si.yanteng@...ux.dev>
To: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>,
 Alexandre Torgue <alexandre.torgue@...s.st.com>,
 Jose Abreu <joabreu@...opsys.com>, Andrew Lunn <andrew+netdev@...n.ch>,
 "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Maxime Coquelin <mcoquelin.stm32@...il.com>
Cc: Russell King <linux@...linux.org.uk>, Furong Xu <0x1207@...il.com>,
 Joao Pinto <Joao.Pinto@...opsys.com>, netdev@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net v4 2/3] net: stmmac: Limit FIFO size by hardware
 capability

在 1/27/25 09:38, Kunihiko Hayashi 写道:
> Tx/Rx FIFO size is specified by the parameter "{tx,rx}-fifo-depth" from
> stmmac_platform layer.
> 
> However, these values are constrained by upper limits determined by the
> capabilities of each hardware feature. There is a risk that the upper
> bits will be truncated due to the calculation, so it's appropriate to
> limit them to the upper limit values and display a warning message.
> 
> This only works if the hardware capability has the upper limit values.
> 
> Fixes: e7877f52fd4a ("stmmac: Read tx-fifo-depth and rx-fifo-depth from the devicetree")
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Reviewed-by: Yanteng Si <si.yanteng@...ux.dev>

Thanks,
Yanteng

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