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Message-ID: <20250203213516.227902-1-tariqt@nvidia.com>
Date: Mon, 3 Feb 2025 23:35:01 +0200
From: Tariq Toukan <tariqt@...dia.com>
To: "David S. Miller" <davem@...emloft.net>, Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Eric Dumazet <edumazet@...gle.com>, "Andrew
Lunn" <andrew+netdev@...n.ch>
CC: <netdev@...r.kernel.org>, Saeed Mahameed <saeedm@...dia.com>, Gal Pressman
<gal@...dia.com>, Jianbo Liu <jianbol@...dia.com>, Moshe Shemesh
<moshe@...dia.com>, Leon Romanovsky <leonro@...dia.com>, Mark Bloch
<mbloch@...dia.com>, Tariq Toukan <tariqt@...dia.com>
Subject: [PATCH net-next 00/15] Support one PTP device per hardware clock
Hi,
This series contains two features from Jianbo, followed by simple
cleanups.
Patches 1-9 by Jianbo add support for one PTP device per hardware clock,
described below [1].
Patches 10-12 by Jianbo add support for 200Gbps per-lane link modes in
kernel and mlx5 driver.
Patches 13-15 are simple cleanups by Gal and Carolina.
Regards,
Tariq
[1]
PHC (PTP hardware clock) is normally shared by multiple functions
(PF/VF/SF). mlx5 driver currently creates a separate PTP device for each
network interface that shares one PHC.
PHC can be configured to work as free running mode or real time mode.
In this series, only one PTP device is created for the shared PHC when
it is running in real time mode.
To support this feature,
* Firmware needs to support clock identity. When functions share a
PHC, the clock identities they query are same.
* Driver dynamically allocates mlx5_clock to represent a PHC.
* New devcom component is added for hardware clock. Functions are
grouped by the identity, and one mlx5_clock is allocated and shared
by the functions with the same identity.
* When PTP device accesses PHC by its callbacks, the first function
in the clock devcom list is selected to send commands to firmware.
* PPS IN event is armed on one function. It should be re-armed on
the other one when current is unloaded.
Carolina Jubran (1):
net/mlx5e: Avoid WARN_ON when configuring MQPRIO with HTB offload
enabled
Gal Pressman (2):
net/mlx5: Remove stray semicolon in LAG port selection table creation
net/mlx5e: Remove unused mlx5e_tc_flow_action struct
Jianbo Liu (12):
net/mlx5: Add helper functions for PTP callbacks
net/mlx5: Change parameters for PTP internal functions
net/mlx5: Add init and destruction functions for a single HW clock
net/mlx5: Add API to get mlx5_core_dev from mlx5_clock
net/mlx5: Change clock in mlx5_core_dev to mlx5_clock pointer
net/mlx5: Add devcom component for the clock shared by functions
net/mlx5: Move PPS notifier and out_work to clock_state
net/mlx5: Support one PTP device per hardware clock
net/mlx5: Generate PPS IN event on new function for shared clock
ethtool: Add support for 200Gbps per lane link modes
net/mlx5: Add support for 200Gbps per lane link modes
net/mlx5e: Support FEC settings for 200G per lane link modes
.../net/ethernet/mellanox/mlx5/core/en/port.c | 64 +-
.../net/ethernet/mellanox/mlx5/core/en/port.h | 1 +
.../net/ethernet/mellanox/mlx5/core/en/ptp.c | 4 +-
.../mellanox/mlx5/core/en/tc/act/act.h | 5 -
.../net/ethernet/mellanox/mlx5/core/en/trap.c | 2 +-
.../net/ethernet/mellanox/mlx5/core/en/xdp.c | 4 +-
.../mellanox/mlx5/core/en/xsk/setup.c | 2 +-
.../ethernet/mellanox/mlx5/core/en_ethtool.c | 22 +
.../net/ethernet/mellanox/mlx5/core/en_main.c | 11 +-
.../mellanox/mlx5/core/lag/port_sel.c | 2 +-
.../ethernet/mellanox/mlx5/core/lib/clock.c | 582 ++++++++++++++----
.../ethernet/mellanox/mlx5/core/lib/clock.h | 39 +-
.../ethernet/mellanox/mlx5/core/lib/devcom.h | 1 +
.../net/ethernet/mellanox/mlx5/core/main.c | 15 +-
.../net/ethernet/mellanox/mlx5/core/port.c | 3 +
drivers/net/phy/phy-core.c | 20 +-
include/linux/mlx5/driver.h | 33 +-
include/linux/mlx5/port.h | 3 +
include/uapi/linux/ethtool.h | 18 +
net/ethtool/common.c | 42 ++
20 files changed, 701 insertions(+), 172 deletions(-)
base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
--
2.45.0
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