| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20250204200446.32bfb3f8@jic23-huawei>
Date: Tue, 4 Feb 2025 20:04:46 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: Michal Simek <michal.simek@....com>
Cc: <linux-kernel@...r.kernel.org>, <monstr@...str.eu>,
<michal.simek@...inx.com>, <git@...inx.com>, Anand Ashok Dumbre
<anand.ashok.dumbre@...inx.com>, Andrew Lunn <andrew+netdev@...n.ch>,
Claudiu Beznea <claudiu.beznea@...on.dev>, "Conor Dooley"
<conor+dt@...nel.org>, Damien Le Moal <dlemoal@...nel.org>, "David S.
Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, "Greg
Kroah-Hartman" <gregkh@...uxfoundation.org>, Harini Katakam
<harini.katakam@....com>, Jakub Kicinski <kuba@...nel.org>, Krzysztof
Kozlowski <krzk+dt@...nel.org>, "Lars-Peter Clausen" <lars@...afoo.de>,
Mark Brown <broonie@...nel.org>, Michael Tretter
<m.tretter@...gutronix.de>, Michael Turquette <mturquette@...libre.com>,
Mubin Sayyed <mubin.sayyed@....com>, Nicolas Ferre
<nicolas.ferre@...rochip.com>, Niklas Cassel <cassel@...nel.org>, Paolo
Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>, Shyam Pandey
<radhey.shyam.pandey@....com>, Stephen Boyd <sboyd@...nel.org>, Vinod Koul
<vkoul@...nel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE
BINDINGS" <devicetree@...r.kernel.org>, "open list:DMA GENERIC OFFLOAD
ENGINE SUBSYSTEM" <dmaengine@...r.kernel.org>, "moderated list:ARM/ZYNQ
ARCHITECTURE" <linux-arm-kernel@...ts.infradead.org>, "open list:COMMON CLK
FRAMEWORK" <linux-clk@...r.kernel.org>, "open list:LIBATA SUBSYSTEM (Serial
and Parallel ATA drivers)" <linux-ide@...r.kernel.org>, "open list:XILINX
AMS DRIVER" <linux-iio@...r.kernel.org>, "open list:SPI SUBSYSTEM"
<linux-spi@...r.kernel.org>, "open list:USB SUBSYSTEM"
<linux-usb@...r.kernel.org>, "open list:NETWORKING DRIVERS"
<netdev@...r.kernel.org>
Subject: Re: [PATCH 2/2] dt-bindings: xilinx: Deprecate header with firmware
constants
On Mon, 3 Feb 2025 17:39:11 +0100
Michal Simek <michal.simek@....com> wrote:
> Firmware contants do not fit the purpose of bindings because they are not
> independent IDs for abstractions. They are more or less just contants which
> better to wire via header with DT which is using it.
> That's why add deprecated message to dt binding header and also update
> existing dt bindings not to use macros from the header and replace them by
> it's value. Actually value is not relevant because it is only example.
>
> The similar changes have been done by commit 9d9292576810 ("dt-bindings:
> pinctrl: samsung: deprecate header with register constants").
>
> Signed-off-by: Michal Simek <michal.simek@....com>
For IIO
Acked-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
> ---
>
> Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml | 4 +---
> .../bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml | 3 +--
> .../devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml | 3 +--
> Documentation/devicetree/bindings/net/cdns,macb.yaml | 7 +++----
> Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml | 3 +--
> Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml | 3 +--
> include/dt-bindings/clock/xlnx-zynqmp-clk.h | 7 +++++++
> 7 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml b/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
> index 9952e0ef7767..6ad78429dc74 100644
> --- a/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
> +++ b/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
> @@ -163,11 +163,9 @@ additionalProperties: false
>
> examples:
> - |
> - #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/power/xlnx-zynqmp-power.h>
> #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
> - #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
> #include <dt-bindings/phy/phy.h>
>
> sata: ahci@...c0000 {
> @@ -175,7 +173,7 @@ examples:
> reg = <0xfd0c0000 0x200>;
> interrupt-parent = <&gic>;
> interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&zynqmp_clk SATA_REF>;
> + clocks = <&zynqmp_clk 22>;
> ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
> ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
> ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
> index ac3198953b8e..b5399c65a731 100644
> --- a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
> +++ b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
> @@ -75,7 +75,6 @@ additionalProperties: false
>
> examples:
> - |
> - #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
>
> fpd_dma_chan1: dma-controller@...00000 {
> compatible = "xlnx,zynqmp-dma-1.0";
> @@ -84,7 +83,7 @@ examples:
> interrupts = <0 117 0x4>;
> #dma-cells = <1>;
> clock-names = "clk_main", "clk_apb";
> - clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
> + clocks = <&zynqmp_clk 19>, <&zynqmp_clk 31>;
> xlnx,bus-width = <128>;
> dma-coherent;
> };
> diff --git a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
> index 8cbad7e792b6..a403392fb263 100644
> --- a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
> @@ -193,7 +193,6 @@ additionalProperties: false
>
> examples:
> - |
> - #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
>
> bus {
> #address-cells = <2>;
> @@ -204,7 +203,7 @@ examples:
> interrupt-parent = <&gic>;
> interrupts = <0 56 4>;
> reg = <0x0 0xffa50000 0x0 0x800>;
> - clocks = <&zynqmp_clk AMS_REF>;
> + clocks = <&zynqmp_clk 70>;
> #address-cells = <1>;
> #size-cells = <1>;
> #io-channel-cells = <1>;
> diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> index 3c30dd23cd4e..8d69846b2e09 100644
> --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> @@ -197,7 +197,6 @@ examples:
> };
>
> - |
> - #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
> #include <dt-bindings/power/xlnx-zynqmp-power.h>
> #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
> #include <dt-bindings/phy/phy.h>
> @@ -210,9 +209,9 @@ examples:
> interrupt-parent = <&gic>;
> interrupts = <0 59 4>, <0 59 4>;
> reg = <0x0 0xff0c0000 0x0 0x1000>;
> - clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
> - <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
> - <&zynqmp_clk GEM_TSU>;
> + clocks = <&zynqmp_clk 31>, <&zynqmp_clk 105>,
> + <&zynqmp_clk 51>, <&zynqmp_clk 50>,
> + <&zynqmp_clk 44>;
> clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
> #address-cells = <1>;
> #size-cells = <0>;
> diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
> index 04d4d3b4916d..02cf1314367b 100644
> --- a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
> +++ b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
> @@ -65,14 +65,13 @@ allOf:
>
> examples:
> - |
> - #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
> soc {
> #address-cells = <2>;
> #size-cells = <2>;
>
> qspi: spi@...f0000 {
> compatible = "xlnx,zynqmp-qspi-1.0";
> - clocks = <&zynqmp_clk QSPI_REF>, <&zynqmp_clk LPD_LSBUS>;
> + clocks = <&zynqmp_clk 53>, <&zynqmp_clk 82>;
> clock-names = "ref_clk", "pclk";
> interrupts = <0 15 4>;
> interrupt-parent = <&gic>;
> diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> index 00f87a558c7d..b5843f4d17d8 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> +++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> @@ -101,7 +101,6 @@ examples:
> #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
> #include <dt-bindings/power/xlnx-zynqmp-power.h>
> #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
> - #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
> #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
> #include <dt-bindings/phy/phy.h>
> axi {
> @@ -113,7 +112,7 @@ examples:
> #size-cells = <0x2>;
> compatible = "xlnx,zynqmp-dwc3";
> reg = <0x0 0xff9d0000 0x0 0x100>;
> - clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
> + clocks = <&zynqmp_clk 32>, <&zynqmp_clk 34>;
> clock-names = "bus_clk", "ref_clk";
> power-domains = <&zynqmp_firmware PD_USB_0>;
> resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
> diff --git a/include/dt-bindings/clock/xlnx-zynqmp-clk.h b/include/dt-bindings/clock/xlnx-zynqmp-clk.h
> index cdc4c0b9a374..f0f7ddd3dcbd 100644
> --- a/include/dt-bindings/clock/xlnx-zynqmp-clk.h
> +++ b/include/dt-bindings/clock/xlnx-zynqmp-clk.h
> @@ -9,6 +9,13 @@
> #ifndef _DT_BINDINGS_CLK_ZYNQMP_H
> #define _DT_BINDINGS_CLK_ZYNQMP_H
>
> +/*
> + * These bindings are deprecated, because they do not match the actual
> + * concept of bindings but rather contain pure firmware values.
> + * Instead include the header in the DTS source directory.
> + */
> +#warning "These bindings are deprecated. Instead use the header in the DTS source directory."
> +
> #define IOPLL 0
> #define RPLL 1
> #define APLL 2
Powered by blists - more mailing lists