netdev - RE: [PATCH RFC net-next 4/4] net: xpcs: allow 1000BASE-X to work with older XPCS IP

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Message-ID:
 <DM3PR11MB87366E2B612488F8AB6C61EAECF12@DM3PR11MB8736.namprd11.prod.outlook.com>
Date: Fri, 7 Feb 2025 18:47:05 +0000
From: <Tristram.Ha@...rochip.com>
To: <rmk+kernel@...linux.org.uk>
CC: <olteanv@...il.com>, <UNGLinuxDriver@...rochip.com>,
	<Woojung.Huh@...rochip.com>, <andrew@...n.ch>, <hkallweit1@...il.com>,
	<davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
	<pabeni@...hat.com>, <netdev@...r.kernel.org>
Subject: RE: [PATCH RFC net-next 4/4] net: xpcs: allow 1000BASE-X to work with
 older XPCS IP

> -----Original Message-----
> From: Russell King <rmk@...linux.org.uk> On Behalf Of Russell King (Oracle)
> Sent: Wednesday, February 5, 2025 5:28 AM
> To: Tristram Ha - C24268 <Tristram.Ha@...rochip.com>
> Cc: Vladimir Oltean <olteanv@...il.com>; UNGLinuxDriver
> <UNGLinuxDriver@...rochip.com>; Woojung Huh - C21699
> <Woojung.Huh@...rochip.com>; Andrew Lunn <andrew@...n.ch>; Heiner Kallweit
> <hkallweit1@...il.com>; David S. Miller <davem@...emloft.net>; Eric Dumazet
> <edumazet@...gle.com>; Jakub Kicinski <kuba@...nel.org>; Paolo Abeni
> <pabeni@...hat.com>; netdev@...r.kernel.org
> Subject: [PATCH RFC net-next 4/4] net: xpcs: allow 1000BASE-X to work with older
> XPCS IP
> 
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content
> is safe
> 
> Older XPCS IP requires SGMII_LINK and PHY_SIDE_SGMII to be set when
> operating in 1000BASE-X mode even though the XPCS is not configured for
> SGMII. An example of a device with older XPCS IP is KSZ9477.
> 
> We already don't clear these bits if we switch from SGMII to 1000BASE-X
> on TXGBE - which would result in 1000BASE-X with the PHY_SIDE_SGMII bit
> left set.
> 
> It is currently believed to be safe to set both bits on newer IP
> without side-effects.
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
> ---
>  drivers/net/pcs/pcs-xpcs.c | 13 +++++++++++--
>  drivers/net/pcs/pcs-xpcs.h |  1 +
>  2 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
> index 1eba0c583f16..d522e4a5a138 100644
> --- a/drivers/net/pcs/pcs-xpcs.c
> +++ b/drivers/net/pcs/pcs-xpcs.c
> @@ -774,9 +774,18 @@ static int xpcs_config_aneg_c37_1000basex(struct dw_xpcs
> *xpcs,
>                         return ret;
>         }
> 
> -       mask = DW_VR_MII_PCS_MODE_MASK;
> +       /* Older XPCS IP requires PHY_MODE (bit 3) and SGMII_LINK (but 4) to
> +        * be set when operating in 1000BASE-X mode. See page 233
> +        *
> https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDo
> cuments/DataSheets/KSZ9477S-Data-Sheet-DS00002392C.pdf
> +        * "5.5.9 SGMII AUTO-NEGOTIATION CONTROL REGISTER"
> +        */
> +       mask = DW_VR_MII_PCS_MODE_MASK | DW_VR_MII_AN_CTRL_SGMII_LINK |
> +              DW_VR_MII_TX_CONFIG_MASK;
>         val = FIELD_PREP(DW_VR_MII_PCS_MODE_MASK,
> -                        DW_VR_MII_PCS_MODE_C37_1000BASEX);
> +                        DW_VR_MII_PCS_MODE_C37_1000BASEX) |
> +             FIELD_PREP(DW_VR_MII_TX_CONFIG_MASK,
> +                        DW_VR_MII_TX_CONFIG_PHY_SIDE_SGMII) |
> +             DW_VR_MII_AN_CTRL_SGMII_LINK;
> 
>         if (!xpcs->pcs.poll) {
>                 mask |= DW_VR_MII_AN_INTR_EN;
> diff --git a/drivers/net/pcs/pcs-xpcs.h b/drivers/net/pcs/pcs-xpcs.h
> index 96117bd9e2b6..f0ddd93c7a22 100644
> --- a/drivers/net/pcs/pcs-xpcs.h
> +++ b/drivers/net/pcs/pcs-xpcs.h
> @@ -73,6 +73,7 @@
> 
>  /* VR_MII_AN_CTRL */
>  #define DW_VR_MII_AN_CTRL_8BIT                 BIT(8)
> +#define DW_VR_MII_AN_CTRL_SGMII_LINK           BIT(4)
>  #define DW_VR_MII_TX_CONFIG_MASK               BIT(3)
>  #define DW_VR_MII_TX_CONFIG_PHY_SIDE_SGMII     0x1
>  #define DW_VR_MII_TX_CONFIG_MAC_SIDE_SGMII     0x0
> --

Tested-by: Tristram Ha <tristram.ha@...rochip.com>