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Message-ID: <e56150f0-1a57-4a04-ae74-d966e3dda5d3@lunn.ch>
Date: Tue, 11 Feb 2025 00:43:31 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Daniel Golle <daniel@...rotopia.org>
Cc: Bo-Cun Chen <bc-bocun.chen@...iatek.com>,
Chad Monroe <chad.monroe@...ran.com>,
John Crispin <john@...ozen.org>, maxime.chevallier@...tlin.com,
"Russell King (Oracle)" <linux@...linux.org.uk>,
Vladimir Oltean <olteanv@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
"Chester A. Unal" <chester.a.unal@...nc9.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
linux-mediatek@...ts.infradead.org,
Matthias Brugger <matthias.bgg@...il.com>, netdev@...r.kernel.org
Subject: Re: upstream Linux support for Ethernet combo ports via external mux
On Mon, Feb 10, 2025 at 11:11:07PM +0000, Daniel Golle wrote:
> Hi,
>
> Looking for ways to support a passive SerDes mux in vanilla Linux I
> found Maxime's slides "Multi-port and Multi-PHY Ethernet interfaces"[1].
Maxime is still working on this. There was a patchset posted
recently...
> The case I want to support is probably quite common nowadays but isn't
> covered there nor implemented in Linux.
>
> +----------------------------+
> | SoC |
> | +-----------------+ |
> | | MAC | |
> | +----+-------+----+ |
> | | PCS | +------+
> | +---=---+ | GPIO |
> +-------------=-------+---=--+
> | |
> +---=---+ |
> | Mux <-------+
> +-=---=-+
> | |
> / \
> +-----=-+ +-=-----+
> | PHY | | SFP |
> +-------+ +-------+
>
> So other than it was when SoCs didn't have built-in PCSs, now the SFP is
> not connected to the PHY, but there is an additional mux IC controlled
> by the SoC to connect the serialized MII either to the PHY (in case no
> SFP is inserted) or to the SFP (in case a module is inserted).
>
> MediaTek came up with a vendor-specific solution[2] for that which works
> well -- but obviously it would be much nicer to have generic, vendor-
> agnostic support for such setups in phylink, ideally based on the
> existing gpio-mux driver.
I don't actually understand how it can work. For the PHY the PCS
probably needs to be running SGMII. For the SFP it probably wants
1000BaseX. It looks like phylink has no idea the mux has been flipped,
so it needs to reprogram the PCS. You cannot just create two phylink
instances and flip flop between them. You need phylink actively
involved so it can correctly manage the PCS.
Andrew
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