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Message-ID: <c5a24fca-2af0-404d-afca-5e5437714676@lunn.ch>
Date: Fri, 14 Feb 2025 16:39:06 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Heiner Kallweit <hkallweit1@...il.com>
Cc: Realtek linux nic maintainers <nic_swsd@...ltek.com>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	Paolo Abeni <pabeni@...hat.com>, Jakub Kicinski <kuba@...nel.org>,
	David Miller <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>, Simon Horman <horms@...nel.org>,
	Russell King - ARM Linux <linux@...linux.org.uk>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH v2 net-next 1/3] r8169: add PHY c45 ops for
 MDIO_MMD_VENDOR2 registers

On Thu, Feb 13, 2025 at 08:15:42PM +0100, Heiner Kallweit wrote:
> The integrated PHYs on chip versions from RTL8168g allow to address
> MDIO_MMD_VEND2 registers. All c22 standard registers are mapped to
> MDIO_MMD_VEND2 registers. So far the paging mechanism is used to
> address PHY registers. Add support for c45 ops to address MDIO_MMD_VEND2
> registers directly, w/o the paging.
> 
> Signed-off-by: Heiner Kallweit <hkallweit1@...il.com>

Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew

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