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Message-ID: <62a03ffc-b461-4097-af03-25d4cdd1388a@amd.com>
Date: Mon, 17 Feb 2025 13:54:40 +0000
From: Alejandro Lucero Palau <alucerop@....com>
To: Ira Weiny <ira.weiny@...el.com>, linux-cxl@...r.kernel.org,
 netdev@...r.kernel.org, dan.j.williams@...el.com, edward.cree@....com,
 davem@...emloft.net, kuba@...nel.org, pabeni@...hat.com,
 edumazet@...gle.com, dave.jiang@...el.com
Subject: Re: [PATCH v10 15/26] sfc: obtain root decoder with enough HPA free
 space


On 2/5/25 22:47, Ira Weiny wrote:
> alucerop@ wrote:
>> From: Alejandro Lucero <alucerop@....com>
> [snip]
>
>> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
>> index 774e1cb4b1cb..a9ff84143e5d 100644
>> --- a/drivers/net/ethernet/sfc/efx_cxl.c
>> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
>> @@ -25,6 +25,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>>   	struct pci_dev *pci_dev = efx->pci_dev;
>>   	DECLARE_BITMAP(expected, CXL_MAX_CAPS);
>>   	DECLARE_BITMAP(found, CXL_MAX_CAPS);
>> +	resource_size_t max_size;
>>   	struct mds_info sfc_mds_info;
>>   	struct efx_cxl *cxl;
>>   
>> @@ -102,6 +103,24 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>>   		goto err_regs;
>>   	}
>>   
>> +	cxl->cxlrd = cxl_get_hpa_freespace(cxl->cxlmd, 1,
>> +					   CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2,
> Won't the addition of CXL_DECODER_F_TYPE2 cause this to fail?  I'm not
> seeing CXL_DECODER_F_TYPE2 set on a decoder in any of the patches.  So
> won't that make the flags check fail?  Why is CXL_DECODER_F_RAM not
> enough?


It does not fail. I have tested this and I know other people have had no 
issue with it.

It seems the root decoders needs to have specific support for type2, so 
this is required.


> Ira
>
> [snip]

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