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Message-ID: <js3z3ra7fyg4qwxbly24xqpnvsv76jyikbhk7aturqigewllbx@gvus6ub46vow>
Date: Mon, 17 Feb 2025 12:16:30 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Andrew Lunn <andrew@...n.ch>,
"Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Inochi Amaoto <inochiama@...il.com>,
Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Chen Wang <unicorn_wang@...look.com>, Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>, Richard Cochran <richardcochran@...il.com>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, "Jan Petrous (OSS)" <jan.petrous@....nxp.com>,
Hariprasad Kelam <hkelam@...vell.com>, Clément Léger <clement.leger@...tlin.com>,
Jisheng Zhang <jszhang@...nel.org>, Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Drew Fustini <dfustini@...storrent.com>, Furong Xu <0x1207@...il.com>,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>, Joe Hattori <joe@...is.s.u-tokyo.ac.jp>,
Serge Semin <fancer.lancer@...il.com>, Lothar Rubusch <l.rubusch@...il.com>,
Giuseppe Cavallaro <peppe.cavallaro@...com>, Jose Abreu <joabreu@...opsys.com>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, sophgo@...ts.linux.dev,
linux-stm32@...md-mailman.stormreply.com, linux-arm-kernel@...ts.infradead.org,
linux-riscv@...ts.infradead.org, Yixun Lan <dlan@...too.org>, Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH net-next v5 3/3] net: stmmac: Add glue layer for Sophgo
SG2044 SoC
On Sun, Feb 16, 2025 at 06:07:05PM +0100, Andrew Lunn wrote:
> On Sun, Feb 16, 2025 at 03:47:18PM +0000, Russell King (Oracle) wrote:
> > On Sun, Feb 16, 2025 at 08:39:51PM +0800, Inochi Amaoto wrote:
> > > +static void sophgo_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
> > > +{
> > > + struct sophgo_dwmac *dwmac = priv;
> > > + long rate;
> > > + int ret;
> > > +
> > > + rate = rgmii_clock(speed);
> > > + if (rate < 0) {
> > > + dev_err(dwmac->dev, "invalid speed %u\n", speed);
> > > + return;
> > > + }
> > > +
> > > + ret = clk_set_rate(dwmac->clk_tx, rate);
> > > + if (ret)
> > > + dev_err(dwmac->dev, "failed to set tx rate %ld: %pe\n",
> > > + rate, ERR_PTR(ret));
> > > +}
> >
> > There are a bunch of other platform support in stmmac that are doing
> > the same:
> >
> > dwmac-s32.c is virtually identical
> > dwmac-imx.c does the same, although has some pre-conditions
> > dwmac-dwc-qos-eth.c is virually identical but the two steps are split
> > across a bunch of register writes
> > dwmac-starfive.c looks the same
> > dwmac-rk.c also
> > dwmac-intel-plat.c also
> >
> > So, I wonder whether either this should be a helper, or whether core
> > code should be doing this. Maybe something to look at as a part of
> > this patch submission?
>
> Inochi, please could you look at the datasheet for this IP. Is the
> transmit clock a part of the IP?
I checked the ip databook and found it is part of the RGMII clock.
Also, I found RGMII also contains a rx clock following this quirk.
> Can we expect all devices integrating this IP to have such a clock?
> That would be a good indicator the clock handling should be moved
> into the core.
>
I am not sure all whether devices has this clock, but it appears in
the databook. So I think it is possible to move this in the core so
any platform with these clock can reuse it.
Regards,
Inochi
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