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Message-ID: <Z7X5Dta3oUgmhnmk@makrotopia.org>
Date: Wed, 19 Feb 2025 15:30:22 +0000
From: Daniel Golle <daniel@...rotopia.org>
To: Andrew Lunn <andrew@...n.ch>
Cc: Sky Huang <SkyLake.Huang@...iatek.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Qingfang Deng <dqfext@...il.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Simon Horman <horms@...nel.org>, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Steven Liu <Steven.Liu@...iatek.com>
Subject: Re: [PATCH net-next v2 1/3] net: phy: mediatek: Add 2.5Gphy firmware
dt-bindings and dts node
On Wed, Feb 19, 2025 at 04:26:21PM +0100, Andrew Lunn wrote:
> > +description: |
> > + MediaTek Built-in 2.5G Ethernet PHY needs to load firmware so it can
> > + run correctly.
> > +
> > +properties:
> > + compatible:
> > + const: "mediatek,2p5gphy-fw"
> > +
> > + reg:
> > + items:
> > + - description: pmb firmware load address
> > + - description: firmware trigger register
> > +
> > +required:
> > + - compatible
> > + - reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + phyfw: phy-firmware@...0000 {
> > + compatible = "mediatek,2p5gphy-fw";
> > + reg = <0 0x0f100000 0 0x20000>,
> > + <0 0x0f0f0018 0 0x20>;
> > + };
>
> This is not a device in itself is it? There is no driver for this.
>
> It seems like these should be properties in the PHY node, since it is
> the PHY driver which make use of them. This cannot be the first SoC
> device which is both on some sort of serial bus, but also has memory
> mapped registers.
I'm afraid it is...
> Please look around and find the correct way to do this.
Would using a 'reserved-memory' region be an option maybe?
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