netdev - Re: [PATCH iwl-next 2/3] ice: change SMA pins to SDP in PTP API

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Message-ID: <20250220131335.GW1615191@kernel.org>
Date: Thu, 20 Feb 2025 13:13:35 +0000
From: Simon Horman <horms@...nel.org>
To: Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>
Cc: intel-wired-lan@...ts.osuosl.org, netdev@...r.kernel.org,
	Karol Kolacinski <karol.kolacinski@...el.com>,
	Milena Olech <milena.olech@...el.com>
Subject: Re: [PATCH iwl-next 2/3] ice: change SMA pins to SDP in PTP API

On Fri, Feb 07, 2025 at 07:02:53PM +0100, Arkadiusz Kubalewski wrote:
> From: Karol Kolacinski <karol.kolacinski@...el.com>
> 
> This change aligns E810 PTP pin control to all other products.
> 
> Currently, SMA/U.FL port expanders are controlled together with SDP pins
> connected to 1588 clock. To align this, separate this control by
> exposing only SDP20..23 pins in PTP API on adapters with DPLL.
> 
> Clear error for all E810 on absent NVM pin section or other errors to
> allow proper initialization on SMA E810 with NVM section.
> 
> Use ARRAY_SIZE for pin array instead of internal definition.
> 
> Reviewed-by: Milena Olech <milena.olech@...el.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@...el.com>
> Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>

Reviewed-by: Simon Horman <horms@...nel.org>