netdev - Re: [PATCH v2 3/3] ethernet: stmmac: dwmac-rk: Make the phy clock could be used for external phy

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <c523a7a8-34db-4902-bfc2-b8207ce4f4a0@lunn.ch>
Date: Thu, 27 Feb 2025 14:53:57 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Kever Yang <kever.yang@...k-chips.com>
Cc: heiko@...ech.de, linux-rockchip@...ts.infradead.org,
	David Wu <david.wu@...k-chips.com>,
	linux-arm-kernel@...ts.infradead.org,
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	netdev@...r.kernel.org,
	Detlev Casanova <detlev.casanova@...labora.com>,
	linux-stm32@...md-mailman.stormreply.com,
	linux-kernel@...r.kernel.org,
	"David S. Miller" <davem@...emloft.net>,
	Jakub Kicinski <kuba@...nel.org>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	Paolo Abeni <pabeni@...hat.com>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Uwe Kleine-König <u.kleine-koenig@...libre.com>,
	"Jan Petrous (OSS)" <jan.petrous@....nxp.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Eric Dumazet <edumazet@...gle.com>
Subject: Re: [PATCH v2 3/3] ethernet: stmmac: dwmac-rk: Make the phy clock
 could be used for external phy

On Thu, Feb 27, 2025 at 07:06:52PM +0800, Kever Yang wrote:
> From: David Wu <david.wu@...k-chips.com>
> 
> Use the phy_clk to prepare_enable and unprepare_disable related phy clock.
> 
> Signed-off-by: David Wu <david.wu@...k-chips.com>
> Signed-off-by: Kever Yang <kever.yang@...k-chips.com>
> ---
> 
> Changes in v2: None
> 
>  drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
> index ccf4ecdffad3..cc90c74ec70c 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
> @@ -1867,12 +1867,14 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)
>  		clk_set_rate(bsp_priv->clk_mac, 50000000);
>  	}
>  
> -	if (plat->phy_node && bsp_priv->integrated_phy) {
> +	if (plat->phy_node) {
>  		bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0);
>  		ret = PTR_ERR_OR_ZERO(bsp_priv->clk_phy);
>  		if (ret)
>  			return dev_err_probe(dev, ret, "Cannot get PHY clock\n");
> -		clk_set_rate(bsp_priv->clk_phy, 50000000);
> +		/* If it is not integrated_phy, clk_phy is optional */
> +		if (bsp_priv->integrated_phy)
> +			clk_set_rate(bsp_priv->clk_phy, 50000000);

That does not look backwards compatible. Older DT blobs which don't
have an integrated PHY won't have a clock in the node, so of_clk_get()
will return an error, and this function then exits with an error code.


    Andrew

---
pw-bot: cr